SPI_DEVICE/2P Simulation Results

Thursday August 28 2025 14:12:23 UTC

GitHub Revision: 05d0058

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	0.650s	779.518ns	0	1	0.00
V1	csr_hw_reset	spi_device_csr_hw_reset	0.570s	1.115us	0	1	0.00
V1	csr_rw	spi_device_csr_rw	0.570s	2.334us	0	1	0.00
V1	csr_bit_bash	spi_device_csr_bit_bash	0.590s	1.087us	0	1	0.00
V1	csr_aliasing	spi_device_csr_aliasing	0.630s	1.297us	0	1	0.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	0.610s	776.303ns	0	1	0.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	0.570s	2.334us	0	1	0.00
		spi_device_csr_aliasing	0.630s	1.297us	0	1	0.00
V1	mem_walk	spi_device_mem_walk	0.560s	2.780us	0	1	0.00
V1	mem_partial_access	spi_device_mem_partial_access	0.580s	3.317us	0	1	0.00
V1		TOTAL			0	8	0.00
V2	csb_read	spi_device_csb_read	0.680s	1.099us	0	1	0.00
V2	mem_parity	spi_device_mem_parity	0.650s	2.210us	0	1	0.00
V2	mem_cfg	spi_device_ram_cfg	0.580s	2.892us	0	1	0.00
V2	tpm_read	spi_device_tpm_rw	0.700s	749.194ns	0	1	0.00
V2	tpm_write	spi_device_tpm_rw	0.700s	749.194ns	0	1	0.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	0.670s	1.205us	0	1	0.00
		spi_device_tpm_sts_read	0.610s	6.503us	0	1	0.00
V2	tpm_fully_random_case	spi_device_tpm_all	0.700s	1.741us	0	1	0.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	0.680s	689.484ns	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	0.640s	5.869us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	0.640s	5.869us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	cmd_info_slots	spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	cmd_read_status	spi_device_intercept	0.610s	1.505us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	cmd_read_jedec	spi_device_intercept	0.610s	1.505us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	cmd_read_sfdp	spi_device_intercept	0.610s	1.505us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	cmd_fast_read	spi_device_intercept	0.610s	1.505us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	cmd_read_pipeline	spi_device_intercept	0.610s	1.505us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	flash_cmd_upload	spi_device_upload	0.620s	3.255us	0	1	0.00
V2	mailbox_command	spi_device_mailbox	0.630s	1.190us	0	1	0.00
V2	mailbox_cross_outside_command	spi_device_mailbox	0.630s	1.190us	0	1	0.00
V2	mailbox_cross_inside_command	spi_device_mailbox	0.630s	1.190us	0	1	0.00
V2	cmd_read_buffer	spi_device_flash_mode	0.630s	1.060us	0	1	0.00
		spi_device_read_buffer_direct	0.590s	913.663ns	0	1	0.00
V2	cmd_dummy_cycle	spi_device_mailbox	0.630s	1.190us	0	1	0.00
		spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	quad_spi	spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	dual_spi	spi_device_flash_all	0.620s	9.445us	0	1	0.00
V2	4b_3b_feature	spi_device_cfg_cmd	0.650s	1.064us	0	1	0.00
V2	write_enable_disable	spi_device_cfg_cmd	0.650s	1.064us	0	1	0.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	0.650s	779.518ns	0	1	0.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	0.600s	3.073us	0	1	0.00
V2	stress_all	spi_device_stress_all	0.620s	646.450ns	0	1	0.00
V2	alert_test	spi_device_alert_test	0.590s	993.054ns	0	1	0.00
V2	intr_test	spi_device_intr_test	0.570s	916.167ns	0	1	0.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	0.620s	958.911ns	0	1	0.00
V2	tl_d_illegal_access	spi_device_tl_errors	0.620s	958.911ns	0	1	0.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	0.570s	1.115us	0	1	0.00
		spi_device_csr_rw	0.570s	2.334us	0	1	0.00
		spi_device_csr_aliasing	0.630s	1.297us	0	1	0.00
		spi_device_same_csr_outstanding	0.620s	1.017us	0	1	0.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	0.570s	1.115us	0	1	0.00
		spi_device_csr_rw	0.570s	2.334us	0	1	0.00
		spi_device_csr_aliasing	0.630s	1.297us	0	1	0.00
		spi_device_same_csr_outstanding	0.620s	1.017us	0	1	0.00
V2		TOTAL			0	22	0.00
V2S	tl_intg_err	spi_device_sec_cm	0.630s	2.042us	0	1	0.00
		spi_device_tl_intg_err	0.610s	3.430us	0	1	0.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	0.610s	3.430us	0	1	0.00
V2S		TOTAL			0	2	0.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	0.630s	1.661us	0	1	0.00
		TOTAL			0	33	0.00

Failure Buckets

• UVM_FATAL (cip_base_vseq.sv:123) virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class! has 33 failures:

  • Test spi_device_csb_read has 1 failures.

    • 0.spi_device_csb_read.92876403050350252674188729130868537142508834401005354128122877404904626331817
      Line 73, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/0.spi_device_csb_read/latest/run.log

        UVM_FATAL @   1099212 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   1099212 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_mem_parity has 1 failures.

    • 0.spi_device_mem_parity.18871972033257942509651255182554444705355132669743425996532408875287560705188
      Line 73, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/0.spi_device_mem_parity/latest/run.log

        UVM_FATAL @   2209650 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   2209650 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_ram_cfg has 1 failures.

    • 0.spi_device_ram_cfg.59155370834443673666903644825396698160860460986678040758415454730227865878287
      Line 73, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/0.spi_device_ram_cfg/latest/run.log

        UVM_FATAL @   2892240 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   2892240 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_tpm_read_hw_reg has 1 failures.

    • 0.spi_device_tpm_read_hw_reg.40913543109033485890303212558273308350121135719593377903443756214278606219918
      Line 73, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/0.spi_device_tpm_read_hw_reg/latest/run.log

        UVM_FATAL @   1204567 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   1204567 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test spi_device_tpm_all has 1 failures.

    • 0.spi_device_tpm_all.76554316130399063367624541324750318652370289784523844837500746986876184113539
      Line 73, in log /nightly/current_run/scratch/master/spi_device_2p-sim-vcs/0.spi_device_tpm_all/latest/run.log

        UVM_FATAL @   1740942 ps: (cip_base_vseq.sv:123) uvm_test_top.env.virtual_sequencer [spi_device_base_vseq] Need to override this when you extend from this class!
        UVM_INFO @   1740942 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • ... and 28 more tests.