| V1 |
smoke |
kmac_smoke |
3.790s |
307.713us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.850s |
22.861us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.910s |
60.563us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
6.030s |
513.558us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
6.220s |
782.055us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.900s |
117.509us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.910s |
60.563us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.220s |
782.055us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.610s |
21.023us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.160s |
39.937us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
5.947m |
31.134ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
2.481m |
5.283ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
23.410s |
630.247us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
28.660s |
2.372ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
17.293m |
111.190ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
10.820s |
2.875ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.737m |
114.319ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
24.479m |
117.487ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
1.590s |
36.312us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
1.410s |
61.444us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
13.330s |
723.525us |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
57.710s |
5.204ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
2.790m |
27.868ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
3.271m |
60.161ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
2.816m |
42.553ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
2.090s |
469.465us |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
1.520s |
66.014us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
19.420s |
4.516ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
5.330s |
1.126ms |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
5.410s |
2.906ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
13.720s |
4.156ms |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
14.370m |
239.910ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.650s |
25.508us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.700s |
64.445us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.330s |
201.418us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.330s |
201.418us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.850s |
22.861us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.910s |
60.563us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.220s |
782.055us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.540s |
136.092us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.850s |
22.861us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.910s |
60.563us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.220s |
782.055us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.540s |
136.092us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.370s |
93.039us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.370s |
93.039us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.370s |
93.039us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.370s |
93.039us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.240s |
367.357us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
30.870s |
5.996ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.210s |
835.675us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.210s |
835.675us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
13.720s |
4.156ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
3.790s |
307.713us |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
13.330s |
723.525us |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.370s |
93.039us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
30.870s |
5.996ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
30.870s |
5.996ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
30.870s |
5.996ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
3.790s |
307.713us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
13.720s |
4.156ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
30.870s |
5.996ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
21.790s |
2.001ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
3.790s |
307.713us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
3.664m |
4.634ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |