RV_TIMER Simulation Results

Tuesday September 02 2025 17:05:38 UTC

GitHub Revision: a14e715

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	random	rv_timer_random	0.810s	39.597us	1	1	100.00
V1	csr_hw_reset	rv_timer_csr_hw_reset	0.510s	64.236us	1	1	100.00
V1	csr_rw	rv_timer_csr_rw	0.670s	12.743us	1	1	100.00
V1	csr_bit_bash	rv_timer_csr_bit_bash	1.210s	39.337us	1	1	100.00
V1	csr_aliasing	rv_timer_csr_aliasing	0.880s	34.647us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	rv_timer_csr_mem_rw_with_rand_reset	0.670s	23.353us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	rv_timer_csr_rw	0.670s	12.743us	1	1	100.00
		rv_timer_csr_aliasing	0.880s	34.647us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	random_reset	rv_timer_random_reset	0.580s	15.205us	1	1	100.00
V2	disabled	rv_timer_disabled	0.920s	409.281us	1	1	100.00
V2	cfg_update_on_fly	rv_timer_cfg_update_on_fly	10.480s	24.474ms	1	1	100.00
V2	no_interrupt_test	rv_timer_cfg_update_on_fly	10.480s	24.474ms	1	1	100.00
V2	stress	rv_timer_stress_all	0.680s	19.390us	1	1	100.00
V2	alert_test	rv_timer_alert_test	0.590s	29.190us	1	1	100.00
V2	intr_test	rv_timer_intr_test	0.550s	215.619us	1	1	100.00
V2	tl_d_oob_addr_access	rv_timer_tl_errors	0.980s	89.717us	1	1	100.00
V2	tl_d_illegal_access	rv_timer_tl_errors	0.980s	89.717us	1	1	100.00
V2	tl_d_outstanding_access	rv_timer_csr_hw_reset	0.510s	64.236us	1	1	100.00
		rv_timer_csr_rw	0.670s	12.743us	1	1	100.00
		rv_timer_csr_aliasing	0.880s	34.647us	1	1	100.00
		rv_timer_same_csr_outstanding	0.750s	709.082us	1	1	100.00
V2	tl_d_partial_access	rv_timer_csr_hw_reset	0.510s	64.236us	1	1	100.00
		rv_timer_csr_rw	0.670s	12.743us	1	1	100.00
		rv_timer_csr_aliasing	0.880s	34.647us	1	1	100.00
		rv_timer_same_csr_outstanding	0.750s	709.082us	1	1	100.00
V2		TOTAL			8	8	100.00
V2S	tl_intg_err	rv_timer_sec_cm	0.850s	134.657us	1	1	100.00
		rv_timer_tl_intg_err	1.250s	425.732us	1	1	100.00
V2S	sec_cm_bus_integrity	rv_timer_tl_intg_err	1.250s	425.732us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	min_value	rv_timer_min	0.530s	50.591us	1	1	100.00
V3	max_value	rv_timer_max	0.640s	32.325us	1	1	100.00
V3	stress_all_with_rand_reset	rv_timer_stress_all_with_rand_reset	41.160s	20.794ms	1	1	100.00
V3		TOTAL			3	3	100.00
		TOTAL			19	19	100.00