RV_TIMER Simulation Results

Wednesday September 03 2025 16:00:25 UTC

GitHub Revision: 83b8114

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	random	rv_timer_random	0.680s	14.032us	1	1	100.00
V1	csr_hw_reset	rv_timer_csr_hw_reset	0.550s	43.312us	1	1	100.00
V1	csr_rw	rv_timer_csr_rw	0.680s	43.373us	1	1	100.00
V1	csr_bit_bash	rv_timer_csr_bit_bash	1.710s	64.098us	1	1	100.00
V1	csr_aliasing	rv_timer_csr_aliasing	0.790s	68.272us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	rv_timer_csr_mem_rw_with_rand_reset	1.160s	89.327us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	rv_timer_csr_rw	0.680s	43.373us	1	1	100.00
		rv_timer_csr_aliasing	0.790s	68.272us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	random_reset	rv_timer_random_reset	0.730s	192.805us	1	1	100.00
V2	disabled	rv_timer_disabled	0.640s	197.048us	1	1	100.00
V2	cfg_update_on_fly	rv_timer_cfg_update_on_fly	8.700s	8.414ms	1	1	100.00
V2	no_interrupt_test	rv_timer_cfg_update_on_fly	8.700s	8.414ms	1	1	100.00
V2	stress	rv_timer_stress_all	4.400s	4.028ms	1	1	100.00
V2	alert_test	rv_timer_alert_test	0.740s	14.855us	1	1	100.00
V2	intr_test	rv_timer_intr_test	0.730s	35.954us	1	1	100.00
V2	tl_d_oob_addr_access	rv_timer_tl_errors	1.220s	29.664us	1	1	100.00
V2	tl_d_illegal_access	rv_timer_tl_errors	1.220s	29.664us	1	1	100.00
V2	tl_d_outstanding_access	rv_timer_csr_hw_reset	0.550s	43.312us	1	1	100.00
		rv_timer_csr_rw	0.680s	43.373us	1	1	100.00
		rv_timer_csr_aliasing	0.790s	68.272us	1	1	100.00
		rv_timer_same_csr_outstanding	0.720s	32.961us	1	1	100.00
V2	tl_d_partial_access	rv_timer_csr_hw_reset	0.550s	43.312us	1	1	100.00
		rv_timer_csr_rw	0.680s	43.373us	1	1	100.00
		rv_timer_csr_aliasing	0.790s	68.272us	1	1	100.00
		rv_timer_same_csr_outstanding	0.720s	32.961us	1	1	100.00
V2		TOTAL			8	8	100.00
V2S	tl_intg_err	rv_timer_sec_cm	0.690s	145.219us	1	1	100.00
		rv_timer_tl_intg_err	1.050s	90.946us	1	1	100.00
V2S	sec_cm_bus_integrity	rv_timer_tl_intg_err	1.050s	90.946us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	min_value	rv_timer_min	0.730s	15.821us	1	1	100.00
V3	max_value	rv_timer_max	0.740s	17.669us	1	1	100.00
V3	stress_all_with_rand_reset	rv_timer_stress_all_with_rand_reset	26.080s	36.280ms	1	1	100.00
V3		TOTAL			3	3	100.00
		TOTAL			19	19	100.00