ADC_CTRL Simulation Results

Thursday September 04 2025 19:17:11 UTC

GitHub Revision: e649bd3

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	adc_ctrl_smoke	1.400s	6.261ms	1	1	100.00
V1	csr_hw_reset	adc_ctrl_csr_hw_reset	3.090s	1.358ms	1	1	100.00
V1	csr_rw	adc_ctrl_csr_rw	0.840s	578.140us	1	1	100.00
V1	csr_bit_bash	adc_ctrl_csr_bit_bash	20.700s	26.203ms	1	1	100.00
V1	csr_aliasing	adc_ctrl_csr_aliasing	3.710s	1.256ms	1	1	100.00
V1	csr_mem_rw_with_rand_reset	adc_ctrl_csr_mem_rw_with_rand_reset	0.950s	393.807us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	adc_ctrl_csr_rw	0.840s	578.140us	1	1	100.00
		adc_ctrl_csr_aliasing	3.710s	1.256ms	1	1	100.00
V1		TOTAL			6	6	100.00
V2	filters_polled	adc_ctrl_filters_polled	1.721m	167.512ms	1	1	100.00
V2	filters_polled_fixed	adc_ctrl_filters_polled_fixed	1.363m	168.252ms	1	1	100.00
V2	filters_interrupt	adc_ctrl_filters_interrupt	34.770s	163.887ms	1	1	100.00
V2	filters_interrupt_fixed	adc_ctrl_filters_interrupt_fixed	4.256m	162.491ms	1	1	100.00
V2	filters_wakeup	adc_ctrl_filters_wakeup	4.900m	194.061ms	1	1	100.00
V2	filters_wakeup_fixed	adc_ctrl_filters_wakeup_fixed	2.226m	410.055ms	1	1	100.00
V2	filters_both	adc_ctrl_filters_both	10.181m	391.154ms	1	1	100.00
V2	clock_gating	adc_ctrl_clock_gating	4.194m	278.469ms	1	1	100.00
V2	poweron_counter	adc_ctrl_poweron_counter	2.270s	2.912ms	1	1	100.00
V2	lowpower_counter	adc_ctrl_lowpower_counter	11.490s	36.524ms	1	1	100.00
V2	fsm_reset	adc_ctrl_fsm_reset	2.309m	76.228ms	1	1	100.00
V2	stress_all	adc_ctrl_stress_all	44.590s	91.757ms	1	1	100.00
V2	alert_test	adc_ctrl_alert_test	1.280s	320.205us	1	1	100.00
V2	intr_test	adc_ctrl_intr_test	1.250s	369.041us	1	1	100.00
V2	tl_d_oob_addr_access	adc_ctrl_tl_errors	1.580s	685.163us	1	1	100.00
V2	tl_d_illegal_access	adc_ctrl_tl_errors	1.580s	685.163us	1	1	100.00
V2	tl_d_outstanding_access	adc_ctrl_csr_hw_reset	3.090s	1.358ms	1	1	100.00
		adc_ctrl_csr_rw	0.840s	578.140us	1	1	100.00
		adc_ctrl_csr_aliasing	3.710s	1.256ms	1	1	100.00
		adc_ctrl_same_csr_outstanding	6.960s	2.598ms	1	1	100.00
V2	tl_d_partial_access	adc_ctrl_csr_hw_reset	3.090s	1.358ms	1	1	100.00
		adc_ctrl_csr_rw	0.840s	578.140us	1	1	100.00
		adc_ctrl_csr_aliasing	3.710s	1.256ms	1	1	100.00
		adc_ctrl_same_csr_outstanding	6.960s	2.598ms	1	1	100.00
V2		TOTAL			16	16	100.00
V2S	tl_intg_err	adc_ctrl_sec_cm	7.550s	4.022ms	1	1	100.00
		adc_ctrl_tl_intg_err	5.880s	8.769ms	1	1	100.00
V2S	sec_cm_bus_integrity	adc_ctrl_tl_intg_err	5.880s	8.769ms	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	stress_all_with_rand_reset	adc_ctrl_stress_all_with_rand_reset	7.820s	2.250ms	1	1	100.00
V3		TOTAL			1	1	100.00
		TOTAL			25	25	100.00