| V1 |
smoke |
aon_timer_smoke |
1.400s |
535.686us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.340s |
728.059us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.040s |
513.380us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
10.690s |
8.193ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.180s |
409.468us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.880s |
343.880us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.040s |
513.380us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.180s |
409.468us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.020s |
419.451us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.030s |
475.430us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.550s |
693.705us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.800s |
718.232us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
18.960s |
58.857ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.060s |
490.458us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.900s |
509.264us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.240s |
912.785us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.240s |
912.785us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.340s |
728.059us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.040s |
513.380us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.180s |
409.468us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.290s |
3.029ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.340s |
728.059us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.040s |
513.380us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.180s |
409.468us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.290s |
3.029ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
11.260s |
7.879ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
13.550s |
8.626ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
13.550s |
8.626ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.030s |
711.436us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.820s |
689.447us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
4.830s |
3.706ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.960s |
727.713us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
13.430s |
4.131ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
25.280s |
45.786ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |