| V1 |
smoke |
kmac_smoke |
1.032m |
17.587ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.910s |
37.485us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.960s |
39.213us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
6.950s |
647.921us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.840s |
220.658us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.530s |
81.710us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.960s |
39.213us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.840s |
220.658us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.760s |
49.256us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.170s |
106.723us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
16.938m |
134.904ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
20.472m |
42.617ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
25.408m |
25.980ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
30.150s |
1.851ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
21.360s |
5.700ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
13.557m |
10.606ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
3.166m |
77.614ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.349m |
9.659ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
3.550s |
212.760us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.510s |
105.413us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
4.154m |
37.197ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
4.490m |
12.809ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
1.209m |
17.200ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
1.772m |
11.369ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
5.582m |
13.777ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
8.890s |
1.138ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
4.580s |
1.640ms |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
22.690s |
1.262ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
0.890s |
18.903us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
20.720s |
28.836ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.480s |
68.176us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
1.847m |
26.902ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.820s |
17.090us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.100s |
157.476us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.660s |
61.804us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.660s |
61.804us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.910s |
37.485us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.960s |
39.213us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.840s |
220.658us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.190s |
94.783us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.910s |
37.485us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.960s |
39.213us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.840s |
220.658us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.190s |
94.783us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.140s |
31.702us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.140s |
31.702us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.140s |
31.702us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.140s |
31.702us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.740s |
383.475us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
1.095m |
26.530ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.520s |
217.768us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.520s |
217.768us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.480s |
68.176us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
1.032m |
17.587ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
4.154m |
37.197ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.140s |
31.702us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
1.095m |
26.530ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
1.095m |
26.530ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
1.095m |
26.530ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
1.032m |
17.587ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.480s |
68.176us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
1.095m |
26.530ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.506m |
19.992ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
1.032m |
17.587ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
49.640s |
3.585ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |