bddb67a| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | otbn_smoke | 26.000s | 0 | 1 | 0.00 | |
| V1 | single_binary | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V1 | csr_hw_reset | otbn_csr_hw_reset | 29.000s | 0 | 1 | 0.00 | |
| V1 | csr_rw | otbn_csr_rw | 21.000s | 0 | 1 | 0.00 | |
| V1 | csr_bit_bash | otbn_csr_bit_bash | 26.000s | 0 | 1 | 0.00 | |
| V1 | csr_aliasing | otbn_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |
| V1 | csr_mem_rw_with_rand_reset | otbn_csr_mem_rw_with_rand_reset | 38.000s | 0 | 1 | 0.00 | |
| V1 | regwen_csr_and_corresponding_lockable_csr | otbn_csr_rw | 21.000s | 0 | 1 | 0.00 | |
| otbn_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |||
| V1 | mem_walk | otbn_mem_walk | 55.000s | 0 | 1 | 0.00 | |
| V1 | mem_partial_access | otbn_mem_partial_access | 19.000s | 0 | 1 | 0.00 | |
| V1 | TOTAL | 0 | 9 | 0.00 | |||
| V2 | reset_recovery | otbn_reset | 38.000s | 0 | 1 | 0.00 | |
| V2 | multi_error | otbn_multi_err | 29.000s | 0 | 1 | 0.00 | |
| V2 | back_to_back | otbn_multi | 13.000s | 0 | 1 | 0.00 | |
| V2 | stress_all | otbn_stress_all | 1.000m | 766.848us | 0 | 1 | 0.00 |
| V2 | lc_escalation | otbn_escalate | 20.000s | 0 | 1 | 0.00 | |
| V2 | zero_state_err_urnd | otbn_zero_state_err_urnd | 13.000s | 0 | 1 | 0.00 | |
| V2 | sw_errs_fatal_chk | otbn_sw_errs_fatal_chk | 38.000s | 0 | 1 | 0.00 | |
| V2 | alert_test | otbn_alert_test | 30.000s | 0 | 1 | 0.00 | |
| V2 | intr_test | otbn_intr_test | 27.000s | 0 | 1 | 0.00 | |
| V2 | tl_d_oob_addr_access | otbn_tl_errors | 5.000s | 99.532us | 1 | 1 | 100.00 |
| V2 | tl_d_illegal_access | otbn_tl_errors | 5.000s | 99.532us | 1 | 1 | 100.00 |
| V2 | tl_d_outstanding_access | otbn_csr_hw_reset | 29.000s | 0 | 1 | 0.00 | |
| otbn_csr_rw | 21.000s | 0 | 1 | 0.00 | |||
| otbn_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |||
| otbn_same_csr_outstanding | 21.000s | 0 | 1 | 0.00 | |||
| V2 | tl_d_partial_access | otbn_csr_hw_reset | 29.000s | 0 | 1 | 0.00 | |
| otbn_csr_rw | 21.000s | 0 | 1 | 0.00 | |||
| otbn_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |||
| otbn_same_csr_outstanding | 21.000s | 0 | 1 | 0.00 | |||
| V2 | TOTAL | 1 | 11 | 9.09 | |||
| V2S | mem_integrity | otbn_imem_err | 35.000s | 0 | 1 | 0.00 | |
| otbn_dmem_err | 21.000s | 0 | 1 | 0.00 | |||
| V2S | internal_integrity | otbn_alu_bignum_mod_err | 29.000s | 0 | 1 | 0.00 | |
| otbn_controller_ispr_rdata_err | 5.000s | 212.413us | 0 | 1 | 0.00 | ||
| otbn_mac_bignum_acc_err | 25.000s | 0 | 1 | 0.00 | |||
| otbn_urnd_err | 3.000s | 144.907us | 0 | 1 | 0.00 | ||
| V2S | illegal_bus_access | otbn_illegal_mem_acc | 30.000s | 0 | 1 | 0.00 | |
| V2S | otbn_mem_gnt_acc_err | otbn_mem_gnt_acc_err | 23.000s | 0 | 1 | 0.00 | |
| V2S | otbn_non_sec_partial_wipe | otbn_partial_wipe | 26.000s | 0 | 1 | 0.00 | |
| V2S | tl_intg_err | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| otbn_tl_intg_err | 26.000s | 0 | 1 | 0.00 | |||
| V2S | passthru_mem_tl_intg_err | otbn_passthru_mem_tl_intg_err | 29.000s | 0 | 1 | 0.00 | |
| V2S | prim_fsm_check | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | prim_count_check | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_mem_scramble | otbn_smoke | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_data_mem_integrity | otbn_dmem_err | 21.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_instruction_mem_integrity | otbn_imem_err | 35.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_bus_integrity | otbn_tl_intg_err | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_controller_fsm_global_esc | otbn_escalate | 20.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_controller_fsm_local_esc | otbn_imem_err | 35.000s | 0 | 1 | 0.00 | |
| otbn_dmem_err | 21.000s | 0 | 1 | 0.00 | |||
| otbn_zero_state_err_urnd | 13.000s | 0 | 1 | 0.00 | |||
| otbn_illegal_mem_acc | 30.000s | 0 | 1 | 0.00 | |||
| otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 | ||
| V2S | sec_cm_controller_fsm_sparse | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_scramble_key_sideload | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_scramble_ctrl_fsm_local_esc | otbn_imem_err | 35.000s | 0 | 1 | 0.00 | |
| otbn_dmem_err | 21.000s | 0 | 1 | 0.00 | |||
| otbn_zero_state_err_urnd | 13.000s | 0 | 1 | 0.00 | |||
| otbn_illegal_mem_acc | 30.000s | 0 | 1 | 0.00 | |||
| otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 | ||
| V2S | sec_cm_scramble_ctrl_fsm_sparse | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_start_stop_ctrl_fsm_global_esc | otbn_escalate | 20.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_start_stop_ctrl_fsm_local_esc | otbn_imem_err | 35.000s | 0 | 1 | 0.00 | |
| otbn_dmem_err | 21.000s | 0 | 1 | 0.00 | |||
| otbn_zero_state_err_urnd | 13.000s | 0 | 1 | 0.00 | |||
| otbn_illegal_mem_acc | 30.000s | 0 | 1 | 0.00 | |||
| otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 | ||
| V2S | sec_cm_start_stop_ctrl_fsm_sparse | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_data_reg_sw_sca | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_ctrl_redun | otbn_ctrl_redun | 33.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_pc_ctrl_flow_redun | otbn_pc_ctrl_flow_redun | 30.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_rnd_bus_consistency | otbn_rnd_sec_cm | 30.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_rnd_rng_digest | otbn_rnd_sec_cm | 30.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_rf_base_data_reg_sw_integrity | otbn_rf_base_intg_err | 22.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_rf_base_data_reg_sw_glitch_detect | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_stack_wr_ptr_ctr_redun | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_integrity | otbn_rf_bignum_intg_err | 38.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_rf_bignum_data_reg_sw_glitch_detect | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_loop_stack_ctr_redun | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | sec_cm_loop_stack_addr_integrity | otbn_stack_addr_integ_chk | 21.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_call_stack_addr_integrity | otbn_stack_addr_integ_chk | 21.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_start_stop_ctrl_state_consistency | otbn_sec_wipe_err | 34.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_data_mem_sec_wipe | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_instruction_mem_sec_wipe | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_data_reg_sw_sec_wipe | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_write_mem_integrity | otbn_multi | 13.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_ctrl_flow_count | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_ctrl_flow_sca | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_data_mem_sw_noaccess | otbn_sw_no_acc | 30.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_key_sideload | otbn_single | 26.000s | 0 | 1 | 0.00 | |
| V2S | sec_cm_tlul_fifo_ctr_redun | otbn_sec_cm | 6.000s | 251.831us | 0 | 1 | 0.00 |
| V2S | TOTAL | 0 | 20 | 0.00 | |||
| V3 | stress_all_with_rand_reset | otbn_stress_all_with_rand_reset | 21.000s | 0 | 1 | 0.00 | |
| V3 | TOTAL | 0 | 1 | 0.00 | |||
| TOTAL | 1 | 41 | 2.44 |
Job returned non-zero exit code has 36 failures:
Test otbn_smoke has 1 failures.
0.otbn_smoke.133995419104067181353097627033619158006802327176254895531117403935396339675
Log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_smoke/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03005'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:40:36 UTC (total: 00:00:26)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test otbn_single has 1 failures.
0.otbn_single.19572426270229476920729396957629302204081894858952840990331663937333855158582
Log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_single/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03005'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:40:37 UTC (total: 00:00:26)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test otbn_multi has 1 failures.
0.otbn_multi.15003676525225088808358425464431393863986623606480742783518282250494752190613
Log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_multi/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03005'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:40:29 UTC (total: 00:00:13)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test otbn_reset has 1 failures.
0.otbn_reset.90297862479097695676246506549112475540712367309149123011056525844327873165727
Log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_reset/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:40:49 UTC (total: 00:00:38)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test otbn_multi_err has 1 failures.
0.otbn_multi_err.5027471449187420374136601377149786681733438607563727831642152325271023991528
Log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_multi_err/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:40:49 UTC (total: 00:00:29)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
... and 31 more tests.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::enc_i_cg@*_*.mnemonic_cp) is an illegal value. has 2 failures:
Test otbn_controller_ispr_rdata_err has 1 failures.
0.otbn_controller_ispr_rdata_err.87351841145919527801878759962728360020754256716476847659447198709750643578914
Line 109, in log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_controller_ispr_rdata_err/latest/run.log
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 1199):(Time: 17200999 PS + 23) Sampled value (27767) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::enc_i_cg@4216_1.mnemonic_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 1488):(Time: 17200999 PS + 23) Sampled value (27767) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::insn_xw_cg@4234_1.mnemonic_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 720):(Time: 17244477 PS + 20) Sampled value (27767) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4199_1.last_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 727):(Time: 17244477 PS + 20) Sampled value (28530) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4199_1.cur_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 1292):(Time: 17244477 PS + 20) Sampled value (28530) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::enc_r_cg@4221_1.mnemonic_cp) is an illegal value.
Test otbn_stress_all has 1 failures.
0.otbn_stress_all.115521628971463447389562199139500901643035352369110305375318774262957824827520
Line 139, in log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_stress_all/latest/run.log
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 1199):(Time: 19628211 PS + 19) Sampled value (1784769650) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::enc_i_cg@4217_1.mnemonic_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 720):(Time: 19669877 PS + 23) Sampled value (1784769650) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4200_1.last_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 727):(Time: 19669877 PS + 23) Sampled value (6385252) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4200_1.cur_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 1292):(Time: 19669877 PS + 23) Sampled value (6385252) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::enc_r_cg@4222_1.mnemonic_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 1462):(Time: 19669877 PS + 23) Sampled value (6385252) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::insn_log_binop_cg@4234_1.mnemonic_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_*/otbn_env_cov.sv, Line: *):(Time: * PS + *) Sampled value (*) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::enc_r_cg@*_*.mnemonic_cp) is an illegal value. has 1 failures:
0.otbn_urnd_err.2182978220814444848875663629555518064660473692407060057723591057874986347049
Line 106, in log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_urnd_err/latest/run.log
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 1292):(Time: 90948881 PS + 21) Sampled value (7564396) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::enc_r_cg@4221_1.mnemonic_cp) is an illegal value.
UVM_INFO @ 104448881 ps: (otbn_urnd_err_vseq.sv:58) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otbn_urnd_err_vseq] Injecting error by force.
UVM_INFO @ 104448881 ps: (otbn_urnd_err_vseq.sv:60) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.otbn_urnd_err_vseq] Locking model immediately.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 720):(Time: 104548881 PS + 15) Sampled value (7564396) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4199_1.last_cp) is an illegal value.
xmsim: *E,EILLEN: (File: /nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_dv_otbn_env_0.1/otbn_env_cov.sv, Line: 727):(Time: 104548881 PS + 15) Sampled value (427138642547) for coverpoint (worklib.otbn_env_pkg::otbn_env_cov::pairwise_insn_cg@4199_1.cur_cp) is an illegal value.
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_*/rtl/otbn.sv,1386): Assertion ErrBitsKnown_A has failed has 1 failures:
0.otbn_sec_cm.8141893726388407293682892232520066885679911367509025773582494338631388378720
Line 104, in log /nightly/current_run/scratch/master/otbn-sim-xcelium/0.otbn_sec_cm/latest/run.log
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_0.1/rtl/otbn.sv,1386): (time 251831111 PS) Assertion tb.dut.ErrBitsKnown_A has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,948): (time 251831111 PS) Assertion tb.dut.u_otbn_core.DoneOKnown_A has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,949): (time 251831111 PS) Assertion tb.dut.u_otbn_core.ImemReqOKnown_A has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,950): (time 251831111 PS) Assertion tb.dut.u_otbn_core.ImemAddrOKnown_AKnownEnable has failed
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/otbn-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,960): (time 251831111 PS) Assertion tb.dut.u_otbn_core.ErrBitsKnown_A has failed