bddb67a| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | pattgen_smoke | 25.000s | 0 | 1 | 0.00 | |
| V1 | csr_hw_reset | pattgen_csr_hw_reset | 1.000s | 12.915us | 1 | 1 | 100.00 |
| V1 | csr_rw | pattgen_csr_rw | 21.000s | 0 | 1 | 0.00 | |
| V1 | csr_bit_bash | pattgen_csr_bit_bash | 34.000s | 0 | 1 | 0.00 | |
| V1 | csr_aliasing | pattgen_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |
| V1 | csr_mem_rw_with_rand_reset | pattgen_csr_mem_rw_with_rand_reset | 33.000s | 0 | 1 | 0.00 | |
| V1 | regwen_csr_and_corresponding_lockable_csr | pattgen_csr_rw | 21.000s | 0 | 1 | 0.00 | |
| pattgen_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |||
| V1 | TOTAL | 1 | 6 | 16.67 | |||
| V2 | perf | pattgen_perf | 26.000s | 0 | 1 | 0.00 | |
| V2 | cnt_rollover | cnt_rollover | 29.000s | 0 | 1 | 0.00 | |
| V2 | error | pattgen_error | 2.000s | 45.461us | 1 | 1 | 100.00 |
| V2 | stress_all | pattgen_stress_all | 29.000s | 0 | 1 | 0.00 | |
| V2 | alert_test | pattgen_alert_test | 20.000s | 0 | 1 | 0.00 | |
| V2 | intr_test | pattgen_intr_test | 29.000s | 0 | 1 | 0.00 | |
| V2 | tl_d_oob_addr_access | pattgen_tl_errors | 42.000s | 0 | 1 | 0.00 | |
| V2 | tl_d_illegal_access | pattgen_tl_errors | 42.000s | 0 | 1 | 0.00 | |
| V2 | tl_d_outstanding_access | pattgen_csr_hw_reset | 1.000s | 12.915us | 1 | 1 | 100.00 |
| pattgen_csr_rw | 21.000s | 0 | 1 | 0.00 | |||
| pattgen_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |||
| pattgen_same_csr_outstanding | 35.000s | 0 | 1 | 0.00 | |||
| V2 | tl_d_partial_access | pattgen_csr_hw_reset | 1.000s | 12.915us | 1 | 1 | 100.00 |
| pattgen_csr_rw | 21.000s | 0 | 1 | 0.00 | |||
| pattgen_csr_aliasing | 21.000s | 0 | 1 | 0.00 | |||
| pattgen_same_csr_outstanding | 35.000s | 0 | 1 | 0.00 | |||
| V2 | TOTAL | 1 | 8 | 12.50 | |||
| V2S | tl_intg_err | pattgen_tl_intg_err | 30.000s | 0 | 1 | 0.00 | |
| pattgen_sec_cm | 29.000s | 0 | 1 | 0.00 | |||
| V2S | sec_cm_bus_integrity | pattgen_tl_intg_err | 30.000s | 0 | 1 | 0.00 | |
| V2S | TOTAL | 0 | 2 | 0.00 | |||
| V3 | stress_all_with_rand_reset | pattgen_stress_all_with_rand_reset | 21.000s | 0 | 1 | 0.00 | |
| V3 | TOTAL | 0 | 1 | 0.00 | |||
| Unmapped tests | pattgen_inactive_level | 29.000s | 0 | 1 | 0.00 | ||
| TOTAL | 2 | 18 | 11.11 |
Job returned non-zero exit code has 16 failures:
Test pattgen_smoke has 1 failures.
0.pattgen_smoke.19925203989496640979614002078757758003694499942826405898004983929850138533411
Log /nightly/current_run/scratch/master/pattgen-sim-xcelium/0.pattgen_smoke/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:26:45 UTC (total: 00:00:25)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test pattgen_perf has 1 failures.
0.pattgen_perf.2224396861748804737644163873955398864465985501339388567601932579849360539680
Log /nightly/current_run/scratch/master/pattgen-sim-xcelium/0.pattgen_perf/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:26:46 UTC (total: 00:00:26)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test cnt_rollover has 1 failures.
0.cnt_rollover.20406334686171220269073859096803586138001161131232471852972488160650229384675
Log /nightly/current_run/scratch/master/pattgen-sim-xcelium/0.cnt_rollover/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:26:52 UTC (total: 00:00:29)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test pattgen_inactive_level has 1 failures.
0.pattgen_inactive_level.96503843688401780094564171453645087956564793592454036409408904022418753997695
Log /nightly/current_run/scratch/master/pattgen-sim-xcelium/0.pattgen_inactive_level/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:26:52 UTC (total: 00:00:29)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
Test pattgen_tl_errors has 1 failures.
0.pattgen_tl_errors.30519822680408609070512127843765239201256540135328327113621035387793065006163
Log /nightly/current_run/scratch/master/pattgen-sim-xcelium/0.pattgen_tl_errors/latest/run.log
Trying to check out license...
Xcelium_Single_Core 24.00 - Failed
Xcelium_Safety_Sim 24.00 - Failed
Xcelium_Safety 24.00 - Failed
Xcelium_Multi_Core 24.00 - Failed
Xcelium_For_Partners 24.00 - Failed
xmsim: *F,NOLICN: Unable to checkout license for the simulation. 'lic_error LMF-03096'.
TOOL: xrun(64) 24.03-s007: Exiting on Sep 18, 2025 at 18:27:07 UTC (total: 00:00:42)
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 2
... and 11 more tests.