b7bab30| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | aon_timer_smoke | 15.594s | 0 | 1 | 0.00 | |
| V1 | csr_hw_reset | aon_timer_csr_hw_reset | 0.740s | 714.432us | 1 | 1 | 100.00 |
| V1 | csr_rw | aon_timer_csr_rw | 0.670s | 386.744us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | aon_timer_csr_bit_bash | 4.900s | 13.103ms | 1 | 1 | 100.00 |
| V1 | csr_aliasing | aon_timer_csr_aliasing | 0.760s | 481.263us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | aon_timer_csr_mem_rw_with_rand_reset | 0.870s | 573.080us | 1 | 1 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | aon_timer_csr_rw | 0.670s | 386.744us | 1 | 1 | 100.00 |
| aon_timer_csr_aliasing | 0.760s | 481.263us | 1 | 1 | 100.00 | ||
| V1 | mem_walk | aon_timer_mem_walk | 0.710s | 316.867us | 1 | 1 | 100.00 |
| V1 | mem_partial_access | aon_timer_mem_partial_access | 0.670s | 369.155us | 1 | 1 | 100.00 |
| V1 | TOTAL | 7 | 8 | 87.50 | |||
| V2 | prescaler | aon_timer_prescaler | 13.330s | 47.507ms | 1 | 1 | 100.00 |
| V2 | jump | aon_timer_jump | 1.220s | 630.984us | 1 | 1 | 100.00 |
| V2 | stress_all | aon_timer_stress_all | 1.465m | 84.846ms | 1 | 1 | 100.00 |
| V2 | alert_test | aon_timer_alert_test | 0.990s | 356.118us | 1 | 1 | 100.00 |
| V2 | intr_test | aon_timer_intr_test | 0.660s | 294.082us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | aon_timer_tl_errors | 18.028s | 0 | 1 | 0.00 | |
| V2 | tl_d_illegal_access | aon_timer_tl_errors | 18.028s | 0 | 1 | 0.00 | |
| V2 | tl_d_outstanding_access | aon_timer_csr_hw_reset | 0.740s | 714.432us | 1 | 1 | 100.00 |
| aon_timer_csr_rw | 0.670s | 386.744us | 1 | 1 | 100.00 | ||
| aon_timer_csr_aliasing | 0.760s | 481.263us | 1 | 1 | 100.00 | ||
| aon_timer_same_csr_outstanding | 1.660s | 1.159ms | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | aon_timer_csr_hw_reset | 0.740s | 714.432us | 1 | 1 | 100.00 |
| aon_timer_csr_rw | 0.670s | 386.744us | 1 | 1 | 100.00 | ||
| aon_timer_csr_aliasing | 0.760s | 481.263us | 1 | 1 | 100.00 | ||
| aon_timer_same_csr_outstanding | 1.660s | 1.159ms | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 6 | 7 | 85.71 | |||
| V2S | tl_intg_err | aon_timer_sec_cm | 5.350s | 3.852ms | 1 | 1 | 100.00 |
| aon_timer_tl_intg_err | 9.460s | 8.034ms | 1 | 1 | 100.00 | ||
| V2S | sec_cm_bus_integrity | aon_timer_tl_intg_err | 9.460s | 8.034ms | 1 | 1 | 100.00 |
| V2S | TOTAL | 2 | 2 | 100.00 | |||
| V3 | max_threshold | aon_timer_smoke_max_thold | 24.798s | 0 | 1 | 0.00 | |
| V3 | min_threshold | aon_timer_smoke_min_thold | 1.040s | 476.392us | 1 | 1 | 100.00 |
| V3 | wkup_count_hi_cdc | aon_timer_wkup_count_cdc_hi | 3.610s | 3.626ms | 1 | 1 | 100.00 |
| V3 | custom_intr | aon_timer_custom_intr | 0.700s | 634.195us | 1 | 1 | 100.00 |
| V3 | alternating_on_off | aon_timer_alternating_enable_on_off | 3.140s | 4.025ms | 1 | 1 | 100.00 |
| V3 | stress_all_with_rand_reset | aon_timer_stress_all_with_rand_reset | 11.160s | 7.833ms | 1 | 1 | 100.00 |
| V3 | TOTAL | 5 | 6 | 83.33 | |||
| TOTAL | 20 | 23 | 86.96 |
Job returned non-zero exit code has 3 failures:
Test aon_timer_smoke has 1 failures.
0.aon_timer_smoke.82963701730307330350232966309967917347856257542715938346800251157654459642609
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_smoke/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 22 19:42 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test aon_timer_smoke_max_thold has 1 failures.
0.aon_timer_smoke_max_thold.67983189609120931132712197890357945452204741312292367431889060303149336042224
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_smoke_max_thold/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 22 19:42 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test aon_timer_tl_errors has 1 failures.
0.aon_timer_tl_errors.10878092292737913969206897670048303192874896547256304048748213532985876556055
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_tl_errors/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 22 19:43 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255