KEYMGR Simulation Results

Monday September 22 2025 19:22:52 UTC

GitHub Revision: b7bab30

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_smoke	16.419s		0	1	0.00
V1	random	keymgr_random	2.230s	101.857us	1	1	100.00
V1	csr_hw_reset	keymgr_csr_hw_reset	0.950s	56.750us	1	1	100.00
V1	csr_rw	keymgr_csr_rw	0.890s	27.104us	1	1	100.00
V1	csr_bit_bash	keymgr_csr_bit_bash	5.000s	137.978us	1	1	100.00
V1	csr_aliasing	keymgr_csr_aliasing	4.790s	224.711us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_csr_mem_rw_with_rand_reset	1.100s	103.818us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_csr_rw	0.890s	27.104us	1	1	100.00
		keymgr_csr_aliasing	4.790s	224.711us	1	1	100.00
V1		TOTAL			6	7	85.71
V2	cfgen_during_op	keymgr_cfg_regwen	4.780s	441.383us	1	1	100.00
V2	sideload	keymgr_sideload	23.240s	5.620ms	1	1	100.00
		keymgr_sideload_kmac	4.110s	222.299us	1	1	100.00
		keymgr_sideload_aes	3.500s	175.218us	1	1	100.00
		keymgr_sideload_otbn	3.810s	296.265us	1	1	100.00
V2	direct_to_disabled_state	keymgr_direct_to_disabled	3.070s	206.688us	1	1	100.00
V2	lc_disable	keymgr_lc_disable	2.600s	169.125us	1	1	100.00
V2	kmac_error_response	keymgr_kmac_rsp_err	2.650s	295.143us	1	1	100.00
V2	invalid_sw_input	keymgr_sw_invalid_input	3.350s	305.659us	1	1	100.00
V2	invalid_hw_input	keymgr_hwsw_invalid_input	3.480s	191.397us	1	1	100.00
V2	sync_async_fault_cross	keymgr_sync_async_fault_cross	1.680s	361.912us	1	1	100.00
V2	stress_all	keymgr_stress_all	2.129m	9.522ms	1	1	100.00
V2	intr_test	keymgr_intr_test	0.780s	16.976us	1	1	100.00
V2	alert_test	keymgr_alert_test	0.870s	26.897us	1	1	100.00
V2	tl_d_oob_addr_access	keymgr_tl_errors	1.030s	19.575us	1	1	100.00
V2	tl_d_illegal_access	keymgr_tl_errors	1.030s	19.575us	1	1	100.00
V2	tl_d_outstanding_access	keymgr_csr_hw_reset	0.950s	56.750us	1	1	100.00
		keymgr_csr_rw	0.890s	27.104us	1	1	100.00
		keymgr_csr_aliasing	4.790s	224.711us	1	1	100.00
		keymgr_same_csr_outstanding	2.460s	158.772us	1	1	100.00
V2	tl_d_partial_access	keymgr_csr_hw_reset	0.950s	56.750us	1	1	100.00
		keymgr_csr_rw	0.890s	27.104us	1	1	100.00
		keymgr_csr_aliasing	4.790s	224.711us	1	1	100.00
		keymgr_same_csr_outstanding	2.460s	158.772us	1	1	100.00
V2		TOTAL			16	16	100.00
V2S	sec_cm_additional_check	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	tl_intg_err	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
		keymgr_tl_intg_err	1.860s	113.519us	1	1	100.00
V2S	shadow_reg_update_error	keymgr_shadow_reg_errors	2.250s	184.948us	1	1	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_shadow_reg_errors	2.250s	184.948us	1	1	100.00
V2S	shadow_reg_storage_error	keymgr_shadow_reg_errors	2.250s	184.948us	1	1	100.00
V2S	shadowed_reset_glitch	keymgr_shadow_reg_errors	2.250s	184.948us	1	1	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_shadow_reg_errors_with_csr_rw	3.120s	99.592us	1	1	100.00
V2S	prim_count_check	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	prim_fsm_check	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_bus_integrity	keymgr_tl_intg_err	1.860s	113.519us	1	1	100.00
V2S	sec_cm_config_shadow	keymgr_shadow_reg_errors	2.250s	184.948us	1	1	100.00
V2S	sec_cm_op_config_regwen	keymgr_cfg_regwen	4.780s	441.383us	1	1	100.00
V2S	sec_cm_reseed_config_regwen	keymgr_random	2.230s	101.857us	1	1	100.00
		keymgr_csr_rw	0.890s	27.104us	1	1	100.00
V2S	sec_cm_sw_binding_config_regwen	keymgr_random	2.230s	101.857us	1	1	100.00
		keymgr_csr_rw	0.890s	27.104us	1	1	100.00
V2S	sec_cm_max_key_ver_config_regwen	keymgr_random	2.230s	101.857us	1	1	100.00
		keymgr_csr_rw	0.890s	27.104us	1	1	100.00
V2S	sec_cm_lc_ctrl_intersig_mubi	keymgr_lc_disable	2.600s	169.125us	1	1	100.00
V2S	sec_cm_constants_consistency	keymgr_hwsw_invalid_input	3.480s	191.397us	1	1	100.00
V2S	sec_cm_intersig_consistency	keymgr_hwsw_invalid_input	3.480s	191.397us	1	1	100.00
V2S	sec_cm_hw_key_sw_noaccess	keymgr_random	2.230s	101.857us	1	1	100.00
V2S	sec_cm_output_keys_ctrl_redun	keymgr_sideload_protect	2.510s	107.972us	1	1	100.00
V2S	sec_cm_ctrl_fsm_sparse	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_data_fsm_sparse	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_ctrl_fsm_local_esc	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_ctrl_fsm_consistency	keymgr_custom_cm	1.360s	470.811us	1	1	100.00
V2S	sec_cm_ctrl_fsm_global_esc	keymgr_lc_disable	2.600s	169.125us	1	1	100.00
V2S	sec_cm_ctrl_ctr_redun	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_kmac_if_fsm_sparse	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_kmac_if_ctr_redun	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_kmac_if_cmd_ctrl_consistency	keymgr_custom_cm	1.360s	470.811us	1	1	100.00
V2S	sec_cm_kmac_if_done_ctrl_consistency	keymgr_custom_cm	1.360s	470.811us	1	1	100.00
V2S	sec_cm_reseed_ctr_redun	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_side_load_sel_ctrl_consistency	keymgr_custom_cm	1.360s	470.811us	1	1	100.00
V2S	sec_cm_sideload_ctrl_fsm_sparse	keymgr_sec_cm	6.520s	6.204ms	1	1	100.00
V2S	sec_cm_ctrl_key_integrity	keymgr_custom_cm	1.360s	470.811us	1	1	100.00
V2S		TOTAL			6	6	100.00
V3	stress_all_with_rand_reset	keymgr_stress_all_with_rand_reset	8.330s	1.863ms	1	1	100.00
V3		TOTAL			1	1	100.00
		TOTAL			29	30	96.67

Failure Buckets

• Job returned non-zero exit code has 1 failures:
  • Test keymgr_smoke has 1 failures.

    • 0.keymgr_smoke.78047917697849805230701135334362904544516591063539434009453404279599367183862
      Log /nightly/current_run/scratch/master/keymgr-sim-vcs/0.keymgr_smoke/latest/run.log

        Chronologic VCS simulator copyright 1991-2023
        Contains Synopsys proprietary information.
        Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64;  Sep 22 19:26 2025
        Feature removed during lmreread, or wrong
        SERVER line hostid.
        Check your license file.
      
        Please contact VCS Customer Support at 1-800-VERILOG for more information.
      
        make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255