| V1 |
smoke |
aon_timer_smoke |
0.850s |
637.152us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.870s |
1.037ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.220s |
497.754us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
1.680s |
5.045ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.870s |
691.547us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.750s |
398.843us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.220s |
497.754us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.870s |
691.547us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.120s |
521.114us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.870s |
377.223us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.381m |
62.114ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
0.980s |
582.591us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.968m |
96.605ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.240s |
427.094us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.040s |
360.112us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.600s |
420.944us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.600s |
420.944us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.870s |
1.037ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.220s |
497.754us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.870s |
691.547us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.180s |
1.999ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.870s |
1.037ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.220s |
497.754us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.870s |
691.547us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.180s |
1.999ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.860s |
4.208ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
13.490s |
8.360ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
13.490s |
8.360ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.690s |
818.500us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.180s |
619.461us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
8.740s |
3.854ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.510s |
519.440us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
11.710s |
4.168ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
4.880s |
2.234ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |