| V1 |
smoke |
kmac_smoke |
41.760s |
8.834ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.990s |
80.272us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.170s |
32.917us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
7.360s |
2.835ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.980s |
284.736us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.490s |
31.935us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.170s |
32.917us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.980s |
284.736us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.900s |
26.054us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.280s |
76.722us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
26.928m |
230.317ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
1.312m |
9.255ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
34.310s |
3.458ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
32.290s |
2.021ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
18.960s |
4.321ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
17.266m |
40.529ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
3.133m |
17.578ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
5.819m |
31.145ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.810s |
397.772us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.580s |
82.380us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
3.754m |
19.821ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
2.321m |
20.862ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
1.538m |
5.614ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
4.537m |
44.024ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
5.296m |
13.021ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
7.440s |
921.298us |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
3.430s |
519.991us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
10.440s |
328.614us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
21.700s |
2.459ms |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
17.230s |
2.288ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.690s |
60.885us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
8.727m |
8.476ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.770s |
17.445us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.150s |
82.086us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.840s |
34.509us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.840s |
34.509us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.990s |
80.272us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.170s |
32.917us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.980s |
284.736us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.040s |
442.792us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.990s |
80.272us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.170s |
32.917us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.980s |
284.736us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.040s |
442.792us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.870s |
217.790us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.870s |
217.790us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.870s |
217.790us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.870s |
217.790us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.940s |
701.854us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
1.273m |
45.916ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.300s |
188.567us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.300s |
188.567us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.690s |
60.885us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
41.760s |
8.834ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
3.754m |
19.821ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.870s |
217.790us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
1.273m |
45.916ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
1.273m |
45.916ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
1.273m |
45.916ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
41.760s |
8.834ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.690s |
60.885us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
1.273m |
45.916ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
2.954m |
35.455ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
41.760s |
8.834ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
2.948m |
18.229ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |