HMAC Simulation Results

Wednesday October 01 2025 17:16:06 UTC

GitHub Revision: f8e4a6c

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke hmac_smoke 6.380s 2.097ms 1 1 100.00
V1 csr_hw_reset hmac_csr_hw_reset 0.690s 29.250us 1 1 100.00
V1 csr_rw hmac_csr_rw 0.860s 16.685us 1 1 100.00
V1 csr_bit_bash hmac_csr_bit_bash 3.970s 110.514us 1 1 100.00
V1 csr_aliasing hmac_csr_aliasing 4.340s 115.134us 1 1 100.00
V1 csr_mem_rw_with_rand_reset hmac_csr_mem_rw_with_rand_reset 6.935m 667.930ms 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr hmac_csr_rw 0.860s 16.685us 1 1 100.00
hmac_csr_aliasing 4.340s 115.134us 1 1 100.00
V1 TOTAL 6 6 100.00
V2 long_msg hmac_long_msg 44.570s 17.570ms 1 1 100.00
V2 back_pressure hmac_back_pressure 12.900s 1.126ms 1 1 100.00
V2 test_vectors hmac_test_sha256_vectors 7.930s 756.474us 1 1 100.00
hmac_test_sha384_vectors 5.302m 35.302ms 1 1 100.00
hmac_test_sha512_vectors 19.180s 240.141us 1 1 100.00
hmac_test_hmac256_vectors 9.110s 1.397ms 1 1 100.00
hmac_test_hmac384_vectors 7.890s 282.304us 1 1 100.00
hmac_test_hmac512_vectors 8.600s 388.800us 1 1 100.00
V2 burst_wr hmac_burst_wr 5.080s 557.737us 1 1 100.00
V2 datapath_stress hmac_datapath_stress 10.809m 10.510ms 1 1 100.00
V2 error hmac_error 54.590s 5.179ms 1 1 100.00
V2 wipe_secret hmac_wipe_secret 18.610s 534.150us 1 1 100.00
V2 save_and_restore hmac_smoke 6.380s 2.097ms 1 1 100.00
hmac_long_msg 44.570s 17.570ms 1 1 100.00
hmac_back_pressure 12.900s 1.126ms 1 1 100.00
hmac_datapath_stress 10.809m 10.510ms 1 1 100.00
hmac_burst_wr 5.080s 557.737us 1 1 100.00
hmac_stress_all 1.919m 51.863ms 1 1 100.00
V2 fifo_empty_status_interrupt hmac_smoke 6.380s 2.097ms 1 1 100.00
hmac_long_msg 44.570s 17.570ms 1 1 100.00
hmac_back_pressure 12.900s 1.126ms 1 1 100.00
hmac_datapath_stress 10.809m 10.510ms 1 1 100.00
hmac_wipe_secret 18.610s 534.150us 1 1 100.00
hmac_test_sha256_vectors 7.930s 756.474us 1 1 100.00
hmac_test_sha384_vectors 5.302m 35.302ms 1 1 100.00
hmac_test_sha512_vectors 19.180s 240.141us 1 1 100.00
hmac_test_hmac256_vectors 9.110s 1.397ms 1 1 100.00
hmac_test_hmac384_vectors 7.890s 282.304us 1 1 100.00
hmac_test_hmac512_vectors 8.600s 388.800us 1 1 100.00
V2 wide_digest_configurable_key_length hmac_smoke 6.380s 2.097ms 1 1 100.00
hmac_long_msg 44.570s 17.570ms 1 1 100.00
hmac_back_pressure 12.900s 1.126ms 1 1 100.00
hmac_datapath_stress 10.809m 10.510ms 1 1 100.00
hmac_burst_wr 5.080s 557.737us 1 1 100.00
hmac_error 54.590s 5.179ms 1 1 100.00
hmac_wipe_secret 18.610s 534.150us 1 1 100.00
hmac_test_sha256_vectors 7.930s 756.474us 1 1 100.00
hmac_test_sha384_vectors 5.302m 35.302ms 1 1 100.00
hmac_test_sha512_vectors 19.180s 240.141us 1 1 100.00
hmac_test_hmac256_vectors 9.110s 1.397ms 1 1 100.00
hmac_test_hmac384_vectors 7.890s 282.304us 1 1 100.00
hmac_test_hmac512_vectors 8.600s 388.800us 1 1 100.00
hmac_stress_all 1.919m 51.863ms 1 1 100.00
V2 stress_all hmac_stress_all 1.919m 51.863ms 1 1 100.00
V2 alert_test hmac_alert_test 0.850s 68.385us 1 1 100.00
V2 intr_test hmac_intr_test 0.670s 26.823us 1 1 100.00
V2 tl_d_oob_addr_access hmac_tl_errors 1.630s 75.993us 1 1 100.00
V2 tl_d_illegal_access hmac_tl_errors 1.630s 75.993us 1 1 100.00
V2 tl_d_outstanding_access hmac_csr_hw_reset 0.690s 29.250us 1 1 100.00
hmac_csr_rw 0.860s 16.685us 1 1 100.00
hmac_csr_aliasing 4.340s 115.134us 1 1 100.00
hmac_same_csr_outstanding 1.030s 64.107us 1 1 100.00
V2 tl_d_partial_access hmac_csr_hw_reset 0.690s 29.250us 1 1 100.00
hmac_csr_rw 0.860s 16.685us 1 1 100.00
hmac_csr_aliasing 4.340s 115.134us 1 1 100.00
hmac_same_csr_outstanding 1.030s 64.107us 1 1 100.00
V2 TOTAL 17 17 100.00
V2S tl_intg_err hmac_sec_cm 1.260s 2.106ms 1 1 100.00
hmac_tl_intg_err 3.580s 1.065ms 1 1 100.00
V2S sec_cm_bus_integrity hmac_tl_intg_err 3.580s 1.065ms 1 1 100.00
V2S TOTAL 2 2 100.00
V3 write_config_and_secret_key_during_msg_wr hmac_smoke 6.380s 2.097ms 1 1 100.00
V3 stress_reset hmac_stress_reset 2.550s 182.686us 1 1 100.00
V3 stress_all_with_rand_reset hmac_stress_all_with_rand_reset 40.780s 2.922ms 1 1 100.00
V3 TOTAL 2 2 100.00
Unmapped tests hmac_directed 1.240s 570.746us 1 1 100.00
TOTAL 28 28 100.00