| V1 |
smoke |
kmac_smoke |
41.600s |
5.886ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.070s |
278.215us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.990s |
52.618us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
10.780s |
305.141us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.130s |
150.023us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.370s |
93.389us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.990s |
52.618us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.130s |
150.023us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.870s |
18.271us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.240s |
30.677us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
6.051m |
4.998ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
11.607m |
21.133ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
41.830s |
14.666ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
28.420s |
1.109ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
18.174m |
13.130ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
15.420s |
1.397ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
37.974m |
187.081ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
30.076m |
298.113ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.670s |
257.485us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.150s |
209.862us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
4.394m |
86.477ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
3.030m |
8.482ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
4.481m |
79.950ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
1.917m |
14.946ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
51.180s |
3.776ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
9.500s |
3.632ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
4.040s |
573.737us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
1.450s |
136.505us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.240s |
62.953us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
33.780s |
14.723ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.810s |
55.345us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
7.931m |
8.456ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.770s |
14.014us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.080s |
54.343us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.410s |
149.816us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.410s |
149.816us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.070s |
278.215us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.990s |
52.618us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.130s |
150.023us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.840s |
87.395us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.070s |
278.215us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.990s |
52.618us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.130s |
150.023us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.840s |
87.395us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.380s |
36.053us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.380s |
36.053us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.380s |
36.053us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.380s |
36.053us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.100s |
47.460us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
55.180s |
4.631ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.860s |
228.489us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.860s |
228.489us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.810s |
55.345us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
41.600s |
5.886ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
4.394m |
86.477ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.380s |
36.053us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
55.180s |
4.631ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
55.180s |
4.631ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
55.180s |
4.631ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
41.600s |
5.886ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.810s |
55.345us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
55.180s |
4.631ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
3.853m |
56.430ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
41.600s |
5.886ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.123m |
7.324ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |