| V1 |
smoke |
aon_timer_smoke |
1.040s |
583.040us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.050s |
1.291ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.330s |
468.555us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
1.520s |
525.203us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.840s |
600.666us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.100s |
476.080us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.330s |
468.555us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.840s |
600.666us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.750s |
483.290us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.810s |
353.659us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
21.770s |
35.090ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.010s |
690.865us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
25.500s |
57.038ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.080s |
343.481us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.740s |
505.622us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.960s |
481.205us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.960s |
481.205us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.050s |
1.291ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.330s |
468.555us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.840s |
600.666us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.510s |
1.319ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.050s |
1.291ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.330s |
468.555us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.840s |
600.666us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.510s |
1.319ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.890s |
8.150ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
7.040s |
8.233ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
7.040s |
8.233ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.120s |
601.872us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.400s |
678.295us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
6.570s |
3.695ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.920s |
719.451us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
4.230s |
4.232ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
35.140s |
18.975ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |