HMAC Simulation Results

Monday October 06 2025 17:11:21 UTC

GitHub Revision: 0f6fcf0

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke hmac_smoke 2.610s 281.870us 1 1 100.00
V1 csr_hw_reset hmac_csr_hw_reset 0.820s 37.654us 1 1 100.00
V1 csr_rw hmac_csr_rw 0.660s 16.511us 1 1 100.00
V1 csr_bit_bash hmac_csr_bit_bash 10.750s 4.382ms 1 1 100.00
V1 csr_aliasing hmac_csr_aliasing 2.170s 58.746us 1 1 100.00
V1 csr_mem_rw_with_rand_reset hmac_csr_mem_rw_with_rand_reset 1.450s 67.885us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr hmac_csr_rw 0.660s 16.511us 1 1 100.00
hmac_csr_aliasing 2.170s 58.746us 1 1 100.00
V1 TOTAL 6 6 100.00
V2 long_msg hmac_long_msg 6.570s 920.268us 1 1 100.00
V2 back_pressure hmac_back_pressure 35.250s 955.001us 1 1 100.00
V2 test_vectors hmac_test_sha256_vectors 7.820s 175.450us 1 1 100.00
hmac_test_sha384_vectors 18.120s 223.307us 1 1 100.00
hmac_test_sha512_vectors 6.125m 13.922ms 1 1 100.00
hmac_test_hmac256_vectors 5.610s 455.582us 1 1 100.00
hmac_test_hmac384_vectors 6.600s 858.676us 1 1 100.00
hmac_test_hmac512_vectors 10.110s 1.374ms 1 1 100.00
V2 burst_wr hmac_burst_wr 6.090s 1.853ms 1 1 100.00
V2 datapath_stress hmac_datapath_stress 4.289m 8.186ms 1 1 100.00
V2 error hmac_error 45.230s 41.282ms 1 1 100.00
V2 wipe_secret hmac_wipe_secret 22.160s 10.638ms 1 1 100.00
V2 save_and_restore hmac_smoke 2.610s 281.870us 1 1 100.00
hmac_long_msg 6.570s 920.268us 1 1 100.00
hmac_back_pressure 35.250s 955.001us 1 1 100.00
hmac_datapath_stress 4.289m 8.186ms 1 1 100.00
hmac_burst_wr 6.090s 1.853ms 1 1 100.00
hmac_stress_all 7.024m 7.386ms 1 1 100.00
V2 fifo_empty_status_interrupt hmac_smoke 2.610s 281.870us 1 1 100.00
hmac_long_msg 6.570s 920.268us 1 1 100.00
hmac_back_pressure 35.250s 955.001us 1 1 100.00
hmac_datapath_stress 4.289m 8.186ms 1 1 100.00
hmac_wipe_secret 22.160s 10.638ms 1 1 100.00
hmac_test_sha256_vectors 7.820s 175.450us 1 1 100.00
hmac_test_sha384_vectors 18.120s 223.307us 1 1 100.00
hmac_test_sha512_vectors 6.125m 13.922ms 1 1 100.00
hmac_test_hmac256_vectors 5.610s 455.582us 1 1 100.00
hmac_test_hmac384_vectors 6.600s 858.676us 1 1 100.00
hmac_test_hmac512_vectors 10.110s 1.374ms 1 1 100.00
V2 wide_digest_configurable_key_length hmac_smoke 2.610s 281.870us 1 1 100.00
hmac_long_msg 6.570s 920.268us 1 1 100.00
hmac_back_pressure 35.250s 955.001us 1 1 100.00
hmac_datapath_stress 4.289m 8.186ms 1 1 100.00
hmac_burst_wr 6.090s 1.853ms 1 1 100.00
hmac_error 45.230s 41.282ms 1 1 100.00
hmac_wipe_secret 22.160s 10.638ms 1 1 100.00
hmac_test_sha256_vectors 7.820s 175.450us 1 1 100.00
hmac_test_sha384_vectors 18.120s 223.307us 1 1 100.00
hmac_test_sha512_vectors 6.125m 13.922ms 1 1 100.00
hmac_test_hmac256_vectors 5.610s 455.582us 1 1 100.00
hmac_test_hmac384_vectors 6.600s 858.676us 1 1 100.00
hmac_test_hmac512_vectors 10.110s 1.374ms 1 1 100.00
hmac_stress_all 7.024m 7.386ms 1 1 100.00
V2 stress_all hmac_stress_all 7.024m 7.386ms 1 1 100.00
V2 alert_test hmac_alert_test 0.590s 129.063us 1 1 100.00
V2 intr_test hmac_intr_test 0.670s 18.396us 1 1 100.00
V2 tl_d_oob_addr_access hmac_tl_errors 1.200s 28.447us 1 1 100.00
V2 tl_d_illegal_access hmac_tl_errors 1.200s 28.447us 1 1 100.00
V2 tl_d_outstanding_access hmac_csr_hw_reset 0.820s 37.654us 1 1 100.00
hmac_csr_rw 0.660s 16.511us 1 1 100.00
hmac_csr_aliasing 2.170s 58.746us 1 1 100.00
hmac_same_csr_outstanding 1.110s 119.852us 1 1 100.00
V2 tl_d_partial_access hmac_csr_hw_reset 0.820s 37.654us 1 1 100.00
hmac_csr_rw 0.660s 16.511us 1 1 100.00
hmac_csr_aliasing 2.170s 58.746us 1 1 100.00
hmac_same_csr_outstanding 1.110s 119.852us 1 1 100.00
V2 TOTAL 17 17 100.00
V2S tl_intg_err hmac_sec_cm 0.740s 75.165us 1 1 100.00
hmac_tl_intg_err 1.630s 87.969us 1 1 100.00
V2S sec_cm_bus_integrity hmac_tl_intg_err 1.630s 87.969us 1 1 100.00
V2S TOTAL 2 2 100.00
V3 write_config_and_secret_key_during_msg_wr hmac_smoke 2.610s 281.870us 1 1 100.00
V3 stress_reset hmac_stress_reset 2.350s 302.972us 1 1 100.00
V3 stress_all_with_rand_reset hmac_stress_all_with_rand_reset 2.559m 53.370ms 1 1 100.00
V3 TOTAL 2 2 100.00
Unmapped tests hmac_directed 1.720s 118.617us 1 1 100.00
TOTAL 28 28 100.00