| V1 |
smoke |
kmac_smoke |
13.000s |
6.955ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.940s |
19.435us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.920s |
57.209us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
6.850s |
1.062ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.050s |
75.924us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.450s |
145.102us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.920s |
57.209us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.050s |
75.924us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.700s |
40.117us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.460s |
56.078us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
48.897m |
134.715ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
1.855m |
6.953ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
20.223m |
17.767ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
24.293m |
256.256ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
22.100s |
6.560ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
9.836m |
9.408ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.428m |
9.554ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.363m |
4.730ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.120s |
29.863us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
1.950s |
24.040us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
4.323m |
52.181ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
17.520s |
677.250us |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
26.350s |
7.726ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
39.750s |
13.064ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
3.337m |
24.281ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
3.550s |
642.176us |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
2.040s |
160.446us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
15.250s |
300.632us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
18.450s |
993.522us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
41.970s |
6.734ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.460s |
41.252us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
3.056m |
7.402ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.780s |
113.753us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.910s |
17.657us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.560s |
106.820us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.560s |
106.820us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.940s |
19.435us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.920s |
57.209us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.050s |
75.924us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.730s |
120.070us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.940s |
19.435us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.920s |
57.209us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.050s |
75.924us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.730s |
120.070us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.490s |
51.165us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.490s |
51.165us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.490s |
51.165us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.490s |
51.165us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.110s |
369.392us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
38.160s |
4.455ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.260s |
440.601us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.260s |
440.601us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.460s |
41.252us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
13.000s |
6.955ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
4.323m |
52.181ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.490s |
51.165us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
38.160s |
4.455ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
38.160s |
4.455ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
38.160s |
4.455ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
13.000s |
6.955ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.460s |
41.252us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
38.160s |
4.455ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.804m |
2.810ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
13.000s |
6.955ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
5.548m |
6.893ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |