| V1 |
smoke |
aon_timer_smoke |
2.380s |
663.008us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.100s |
890.336us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.880s |
365.837us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
4.880s |
7.320ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.920s |
449.860us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.420s |
534.694us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.880s |
365.837us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.920s |
449.860us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.960s |
417.272us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.960s |
508.830us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
6.230s |
41.596ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.140s |
588.654us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
16.300s |
82.741ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
0.950s |
329.311us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.280s |
482.868us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.250s |
526.815us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.250s |
526.815us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.100s |
890.336us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.880s |
365.837us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.920s |
449.860us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.090s |
1.205ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.100s |
890.336us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.880s |
365.837us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.920s |
449.860us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.090s |
1.205ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.460s |
8.452ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
2.430s |
4.805ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
2.430s |
4.805ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.120s |
694.101us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.900s |
535.339us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
5.680s |
3.872ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.810s |
603.641us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
6.540s |
3.995ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
12.550s |
3.516ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |