| V1 |
smoke |
kmac_smoke |
10.130s |
3.366ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.080s |
32.892us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.280s |
80.234us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
6.960s |
775.452us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.990s |
506.739us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.500s |
417.172us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.280s |
80.234us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.990s |
506.739us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.790s |
37.033us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.160s |
104.301us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
29.521m |
20.946ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
4.156m |
3.412ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
36.020s |
2.602ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
34.570s |
4.184ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
21.110s |
3.398ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
13.390s |
2.992ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.515m |
31.386ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
2.219m |
30.769ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.160s |
115.811us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.690s |
116.996us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
4.349m |
42.131ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
1.440m |
4.404ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
1.534m |
21.737ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
3.812m |
12.368ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.410m |
5.869ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
6.130s |
904.053us |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
2.350s |
97.532us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
1.540s |
133.965us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.370s |
25.228us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
32.370s |
3.555ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.770s |
207.046us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
9.541m |
124.288ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.800s |
45.353us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.150s |
17.182us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.050s |
36.410us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.050s |
36.410us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.080s |
32.892us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.280s |
80.234us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.990s |
506.739us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.450s |
53.144us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.080s |
32.892us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.280s |
80.234us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.990s |
506.739us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.450s |
53.144us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.980s |
397.530us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.980s |
397.530us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.980s |
397.530us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.980s |
397.530us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.640s |
143.282us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
33.620s |
9.447ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.410s |
209.297us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.410s |
209.297us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.770s |
207.046us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
10.130s |
3.366ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
4.349m |
42.131ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.980s |
397.530us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
33.620s |
9.447ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
33.620s |
9.447ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
33.620s |
9.447ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
10.130s |
3.366ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.770s |
207.046us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
33.620s |
9.447ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
5.262m |
60.016ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
10.130s |
3.366ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
50.990s |
13.462ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |