| V1 |
smoke |
kmac_smoke |
26.720s |
6.510ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.930s |
56.205us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.810s |
69.494us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
5.570s |
149.184us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
2.860s |
138.530us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.980s |
39.404us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.810s |
69.494us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
2.860s |
138.530us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.690s |
41.485us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.280s |
19.056us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
12.776m |
11.101ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
8.475m |
8.376ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
26.190s |
621.989us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
22.970s |
569.360us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
19.300s |
1.195ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
11.590s |
997.735us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
32.225m |
71.642ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.235m |
6.209ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.680s |
72.670us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
1.480s |
32.232us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
1.213m |
3.725ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
1.703m |
13.303ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
2.888m |
27.156ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
2.660m |
30.348ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
2.345m |
3.032ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
4.620s |
1.093ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
1.910s |
470.923us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
20.130s |
1.454ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
20.870s |
368.802us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
44.920s |
6.640ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.760s |
45.866us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
28.856m |
89.950ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.680s |
17.767us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.020s |
16.128us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.800s |
155.212us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.800s |
155.212us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.930s |
56.205us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.810s |
69.494us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
2.860s |
138.530us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.290s |
177.310us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.930s |
56.205us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.810s |
69.494us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
2.860s |
138.530us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.290s |
177.310us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.470s |
28.630us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.470s |
28.630us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.470s |
28.630us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.470s |
28.630us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.060s |
283.416us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
24.800s |
6.204ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.330s |
1.001ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.330s |
1.001ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.760s |
45.866us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
26.720s |
6.510ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
1.213m |
3.725ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.470s |
28.630us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
24.800s |
6.204ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
24.800s |
6.204ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
24.800s |
6.204ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
26.720s |
6.510ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.760s |
45.866us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
24.800s |
6.204ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
2.041m |
13.404ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
26.720s |
6.510ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.895m |
2.842ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |