SPI_DEVICE/1R1W Simulation Results

Monday October 13 2025 17:20:49 UTC

GitHub Revision: b8fc3df

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	41.740s	7.425ms	1	1	100.00
V1	csr_hw_reset	spi_device_csr_hw_reset	1.010s	101.956us	1	1	100.00
V1	csr_rw	spi_device_csr_rw	1.060s	57.245us	1	1	100.00
V1	csr_bit_bash	spi_device_csr_bit_bash	22.800s	2.366ms	1	1	100.00
V1	csr_aliasing	spi_device_csr_aliasing	15.750s	912.020us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	2.130s	74.212us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	1.060s	57.245us	1	1	100.00
		spi_device_csr_aliasing	15.750s	912.020us	1	1	100.00
V1	mem_walk	spi_device_mem_walk	0.710s	69.760us	1	1	100.00
V1	mem_partial_access	spi_device_mem_partial_access	1.510s	65.929us	1	1	100.00
V1		TOTAL			8	8	100.00
V2	csb_read	spi_device_csb_read	0.810s	17.106us	1	1	100.00
V2	mem_parity	spi_device_mem_parity	0.700s	2.748us	0	1	0.00
V2	mem_cfg	spi_device_ram_cfg	0.930s	9.804us	0	1	0.00
V2	tpm_read	spi_device_tpm_rw	1.490s	237.290us	1	1	100.00
V2	tpm_write	spi_device_tpm_rw	1.490s	237.290us	1	1	100.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	4.480s	7.131ms	1	1	100.00
		spi_device_tpm_sts_read	0.710s	20.564us	1	1	100.00
V2	tpm_fully_random_case	spi_device_tpm_all	33.140s	9.927ms	1	1	100.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	13.000s	11.125ms	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	5.300s	3.755ms	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	5.300s	3.755ms	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	cmd_info_slots	spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	cmd_read_status	spi_device_intercept	1.670s	334.644us	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	cmd_read_jedec	spi_device_intercept	1.670s	334.644us	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	cmd_read_sfdp	spi_device_intercept	1.670s	334.644us	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	cmd_fast_read	spi_device_intercept	1.670s	334.644us	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	cmd_read_pipeline	spi_device_intercept	1.670s	334.644us	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	flash_cmd_upload	spi_device_upload	1.990s	150.887us	1	1	100.00
V2	mailbox_command	spi_device_mailbox	5.330s	6.618ms	1	1	100.00
V2	mailbox_cross_outside_command	spi_device_mailbox	5.330s	6.618ms	1	1	100.00
V2	mailbox_cross_inside_command	spi_device_mailbox	5.330s	6.618ms	1	1	100.00
V2	cmd_read_buffer	spi_device_flash_mode	21.200s	2.407ms	1	1	100.00
		spi_device_read_buffer_direct	4.670s	678.809us	1	1	100.00
V2	cmd_dummy_cycle	spi_device_mailbox	5.330s	6.618ms	1	1	100.00
		spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	quad_spi	spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	dual_spi	spi_device_flash_all	17.640s	1.231ms	1	1	100.00
V2	4b_3b_feature	spi_device_cfg_cmd	13.820s	3.682ms	1	1	100.00
V2	write_enable_disable	spi_device_cfg_cmd	13.820s	3.682ms	1	1	100.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	41.740s	7.425ms	1	1	100.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	30.570s	11.638ms	1	1	100.00
V2	stress_all	spi_device_stress_all	7.374m	71.780ms	1	1	100.00
V2	alert_test	spi_device_alert_test	1.080s	60.273us	1	1	100.00
V2	intr_test	spi_device_intr_test	0.710s	12.532us	1	1	100.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	3.420s	73.468us	1	1	100.00
V2	tl_d_illegal_access	spi_device_tl_errors	3.420s	73.468us	1	1	100.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	1.010s	101.956us	1	1	100.00
		spi_device_csr_rw	1.060s	57.245us	1	1	100.00
		spi_device_csr_aliasing	15.750s	912.020us	1	1	100.00
		spi_device_same_csr_outstanding	2.030s	42.470us	1	1	100.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	1.010s	101.956us	1	1	100.00
		spi_device_csr_rw	1.060s	57.245us	1	1	100.00
		spi_device_csr_aliasing	15.750s	912.020us	1	1	100.00
		spi_device_same_csr_outstanding	2.030s	42.470us	1	1	100.00
V2		TOTAL			20	22	90.91
V2S	tl_intg_err	spi_device_sec_cm	0.870s	78.553us	1	1	100.00
		spi_device_tl_intg_err	15.210s	3.271ms	1	1	100.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	15.210s	3.271ms	1	1	100.00
V2S		TOTAL			2	2	100.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	48.390s	30.771ms	1	1	100.00
		TOTAL			31	33	93.94

Failure Buckets

• UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*]) has 1 failures:

  • Test spi_device_mem_parity has 1 failures.

    • 0.spi_device_mem_parity.60759415276541902197156414115851172448649854614779964538457867698794113136527
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log

        UVM_ERROR @   2060609 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[61])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
        UVM_ERROR @   2060609 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
        UVM_ERROR @   2060609 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[957])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
      

• UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*]) has 1 failures:

  • Test spi_device_ram_cfg has 1 failures.

    • 0.spi_device_ram_cfg.8977305090000937143047632074291391446007262470056082816172172337674578526853
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log

        UVM_ERROR @   6784088 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xcb151b [110010110001010100011011] vs 0x0 [0])
        UVM_ERROR @   6871088 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x3950fc [1110010101000011111100] vs 0x0 [0])
        UVM_ERROR @   6950088 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xe36af [11100011011010101111] vs 0x0 [0])
        UVM_ERROR @   6975088 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x7a888b [11110101000100010001011] vs 0x0 [0])
        UVM_ERROR @   7051088 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xa0ac76 [101000001010110001110110] vs 0x0 [0])