| V1 |
smoke |
aon_timer_smoke |
1.650s |
699.253us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.870s |
741.222us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.940s |
478.281us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
12.180s |
14.008ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.990s |
485.623us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.930s |
271.277us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.940s |
478.281us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.990s |
485.623us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.960s |
517.965us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.940s |
452.345us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.950s |
881.639us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.180s |
527.639us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.201m |
119.275ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.540s |
500.810us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.860s |
288.097us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.850s |
373.814us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.850s |
373.814us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.870s |
741.222us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.940s |
478.281us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.990s |
485.623us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.060s |
1.416ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.870s |
741.222us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.940s |
478.281us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.990s |
485.623us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.060s |
1.416ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
9.030s |
8.576ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
4.750s |
8.542ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
4.750s |
8.542ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.990s |
600.966us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.240s |
523.660us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.490s |
4.070ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.890s |
639.254us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
13.950s |
4.029ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
18.260s |
19.642ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |