| V1 |
smoke |
aon_timer_smoke |
1.140s |
565.896us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.970s |
1.127ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.700s |
305.952us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.240s |
7.289ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.760s |
551.186us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.720s |
322.465us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.700s |
305.952us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.760s |
551.186us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.930s |
521.539us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.010s |
464.776us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
3.220s |
1.920ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.160s |
633.342us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
21.080s |
71.750ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.160s |
371.099us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.570s |
330.172us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.200s |
411.870us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.200s |
411.870us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.970s |
1.127ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.700s |
305.952us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.760s |
551.186us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.560s |
1.518ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.970s |
1.127ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.700s |
305.952us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.760s |
551.186us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.560s |
1.518ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
2.150s |
4.058ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
11.260s |
8.590ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
11.260s |
8.590ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.470s |
533.075us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.320s |
541.754us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.410s |
4.113ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.410s |
629.513us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
2.940s |
4.120ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
25.490s |
4.613ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |