ENTROPY_SRC/RNG_4BITS Simulation Results

Thursday October 16 2025 17:16:32 UTC

GitHub Revision: aae3d67

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 3.000s 55.336us 1 1 100.00
V1 csr_hw_reset entropy_src_csr_hw_reset 2.000s 35.071us 1 1 100.00
V1 csr_rw entropy_src_csr_rw 2.000s 17.534us 1 1 100.00
V1 csr_bit_bash entropy_src_csr_bit_bash 8.000s 1.042ms 1 1 100.00
V1 csr_aliasing entropy_src_csr_aliasing 3.000s 44.059us 1 1 100.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 3.000s 93.454us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 2.000s 17.534us 1 1 100.00
entropy_src_csr_aliasing 3.000s 44.059us 1 1 100.00
V1 TOTAL 6 6 100.00
V2 firmware entropy_src_smoke 3.000s 55.336us 1 1 100.00
entropy_src_rng 4.050m 14.019ms 1 1 100.00
entropy_src_fw_ov 1.333m 11.072ms 1 1 100.00
V2 firmware_mode entropy_src_fw_ov 1.333m 11.072ms 1 1 100.00
V2 rng_mode entropy_src_rng 4.050m 14.019ms 1 1 100.00
V2 rng_max_rate entropy_src_rng_max_rate 4.150m 16.041ms 1 1 100.00
V2 health_checks entropy_src_rng 4.050m 14.019ms 1 1 100.00
V2 conditioning entropy_src_rng 4.050m 14.019ms 1 1 100.00
V2 interrupts entropy_src_rng 4.050m 14.019ms 1 1 100.00
entropy_src_intr 3.000s 78.596us 1 1 100.00
V2 alerts entropy_src_rng 4.050m 14.019ms 1 1 100.00
entropy_src_functional_alerts 6.000s 719.455us 1 1 100.00
V2 stress_all entropy_src_stress_all 21.000s 19.060ms 1 1 100.00
V2 functional_errors entropy_src_functional_errors 2.000s 78.715us 1 1 100.00
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 5.000s 193.909us 1 1 100.00
V2 intr_test entropy_src_intr_test 2.000s 35.621us 1 1 100.00
V2 alert_test entropy_src_alert_test 2.000s 90.405us 1 1 100.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 3.000s 185.992us 1 1 100.00
V2 tl_d_illegal_access entropy_src_tl_errors 3.000s 185.992us 1 1 100.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 2.000s 35.071us 1 1 100.00
entropy_src_csr_rw 2.000s 17.534us 1 1 100.00
entropy_src_csr_aliasing 3.000s 44.059us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 71.147us 1 1 100.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 2.000s 35.071us 1 1 100.00
entropy_src_csr_rw 2.000s 17.534us 1 1 100.00
entropy_src_csr_aliasing 3.000s 44.059us 1 1 100.00
entropy_src_same_csr_outstanding 3.000s 71.147us 1 1 100.00
V2 TOTAL 12 12 100.00
V2S tl_intg_err entropy_src_sec_cm 3.000s 110.239us 1 1 100.00
entropy_src_tl_intg_err 4.000s 117.539us 1 1 100.00
V2S sec_cm_config_regwen entropy_src_rng 4.050m 14.019ms 1 1 100.00
entropy_src_cfg_regwen 2.000s 262.982us 1 1 100.00
V2S sec_cm_config_mubi entropy_src_rng 4.050m 14.019ms 1 1 100.00
V2S sec_cm_config_redun entropy_src_rng 4.050m 14.019ms 1 1 100.00
V2S sec_cm_intersig_mubi entropy_src_rng 4.050m 14.019ms 1 1 100.00
entropy_src_fw_ov 1.333m 11.072ms 1 1 100.00
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 2.000s 78.715us 1 1 100.00
entropy_src_sec_cm 3.000s 110.239us 1 1 100.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 2.000s 78.715us 1 1 100.00
entropy_src_sec_cm 3.000s 110.239us 1 1 100.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 4.050m 14.019ms 1 1 100.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 2.000s 78.715us 1 1 100.00
entropy_src_sec_cm 3.000s 110.239us 1 1 100.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 2.000s 78.715us 1 1 100.00
entropy_src_sec_cm 3.000s 110.239us 1 1 100.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 2.000s 78.715us 1 1 100.00
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 6.000s 719.455us 1 1 100.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 4.000s 117.539us 1 1 100.00
V2S TOTAL 3 3 100.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 3.567m 14.060ms 1 1 100.00
V3 TOTAL 1 1 100.00
TOTAL 22 22 100.00