| V1 |
smoke |
kmac_smoke |
3.180s |
218.561us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.030s |
41.105us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.870s |
15.751us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
10.830s |
288.788us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.970s |
508.450us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.270s |
43.461us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.870s |
15.751us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.970s |
508.450us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.070s |
30.026us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.320s |
147.722us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
33.837m |
26.440ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
19.850m |
35.162ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
33.282m |
162.325ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
32.880s |
4.054ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
21.480s |
3.918ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
18.263m |
97.789ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.346m |
22.684ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.942m |
10.146ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.640s |
245.959us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.630s |
115.375us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
3.187m |
19.944ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
2.752m |
3.462ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
1.893m |
10.847ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
1.692m |
9.773ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.220m |
1.449ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
1.570s |
523.225us |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
7.440s |
149.621us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
14.940s |
291.138us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.500s |
70.193us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
55.350s |
15.791ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
26.180s |
624.544us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
14.144m |
34.490ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.870s |
46.048us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.150s |
12.709us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.800s |
54.151us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.800s |
54.151us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.030s |
41.105us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.870s |
15.751us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.970s |
508.450us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.400s |
241.069us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.030s |
41.105us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.870s |
15.751us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.970s |
508.450us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.400s |
241.069us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.280s |
39.778us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.280s |
39.778us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.280s |
39.778us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.280s |
39.778us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.660s |
52.967us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
28.280s |
8.135ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.180s |
752.969us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.180s |
752.969us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
26.180s |
624.544us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
3.180s |
218.561us |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
3.187m |
19.944ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.280s |
39.778us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
28.280s |
8.135ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
28.280s |
8.135ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
28.280s |
8.135ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
3.180s |
218.561us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
26.180s |
624.544us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
28.280s |
8.135ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
4.288m |
29.049ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
3.180s |
218.561us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
3.796m |
3.911ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |