| V1 |
smoke |
aon_timer_smoke |
1.360s |
557.992us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.720s |
999.310us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.080s |
544.794us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.750s |
7.226ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.060s |
618.698us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.940s |
492.980us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.080s |
544.794us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.060s |
618.698us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.850s |
407.075us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.080s |
509.099us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
57.920s |
43.515ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.600s |
614.856us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
3.150s |
6.741ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.110s |
470.791us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.170s |
333.140us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.320s |
625.346us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.320s |
625.346us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.720s |
999.310us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.080s |
544.794us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.060s |
618.698us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.290s |
2.612ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.720s |
999.310us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.080s |
544.794us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.060s |
618.698us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.290s |
2.612ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
10.990s |
8.265ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
2.650s |
5.052ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
2.650s |
5.052ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.370s |
564.151us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.860s |
685.390us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.120s |
3.332ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.920s |
801.321us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
3.500s |
4.177ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
8.840s |
2.313ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |