| V1 |
smoke |
aon_timer_smoke |
1.330s |
588.332us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.230s |
967.450us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.110s |
460.674us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
30.620s |
13.080ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.780s |
502.289us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.030s |
398.696us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.110s |
460.674us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.780s |
502.289us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.040s |
369.870us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.070s |
415.140us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
22.040s |
61.965ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.040s |
647.402us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
16.990s |
153.966ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
0.770s |
524.183us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.730s |
468.435us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.180s |
544.302us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.180s |
544.302us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.230s |
967.450us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.110s |
460.674us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.780s |
502.289us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
0.830s |
1.507ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.230s |
967.450us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.110s |
460.674us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.780s |
502.289us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
0.830s |
1.507ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
4.600s |
3.938ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
3.870s |
9.119ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
3.870s |
9.119ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.890s |
636.228us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.320s |
660.254us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
6.040s |
3.788ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.790s |
667.672us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
10.700s |
4.077ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
17.060s |
9.626ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |