| V1 |
smoke |
kmac_smoke |
18.790s |
1.044ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.920s |
58.580us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.860s |
24.957us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
10.200s |
578.748us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
6.360s |
404.212us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.850s |
138.689us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.860s |
24.957us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.360s |
404.212us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.010s |
24.689us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.170s |
133.324us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
22.146m |
44.767ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
16.650m |
108.569ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
29.790s |
5.328ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
32.110s |
2.543ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
30.240s |
6.697ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
13.744m |
39.703ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
29.682m |
295.280ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.788m |
10.072ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.590s |
40.263us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.540s |
597.643us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
46.290s |
784.882us |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
57.560s |
3.399ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
2.753m |
20.164ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
4.861m |
92.696ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
40.170s |
18.327ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
8.930s |
4.801ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
2.860s |
53.517us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
26.380s |
5.565ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.110s |
24.085us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
7.210s |
885.332us |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.440s |
25.714us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
18.647m |
282.161ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.710s |
14.092us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.900s |
36.521us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.290s |
183.670us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.290s |
183.670us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.920s |
58.580us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.860s |
24.957us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.360s |
404.212us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.680s |
146.693us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.920s |
58.580us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.860s |
24.957us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.360s |
404.212us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.680s |
146.693us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.740s |
219.763us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.740s |
219.763us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.740s |
219.763us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.740s |
219.763us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.520s |
507.120us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
51.150s |
9.975ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.280s |
748.249us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.280s |
748.249us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.440s |
25.714us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
18.790s |
1.044ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
46.290s |
784.882us |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.740s |
219.763us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
51.150s |
9.975ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
51.150s |
9.975ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
51.150s |
9.975ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
18.790s |
1.044ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.440s |
25.714us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
51.150s |
9.975ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.889m |
8.564ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
18.790s |
1.044ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
2.251m |
6.338ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |