| V1 |
smoke |
kmac_smoke |
39.700s |
10.473ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.000s |
46.843us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.830s |
21.860us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
7.100s |
2.030ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.560s |
196.599us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.600s |
44.567us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.830s |
21.860us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.560s |
196.599us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.660s |
36.591us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.200s |
59.187us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
22.646m |
58.644ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
10.707m |
36.477ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
37.980s |
17.547ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
31.520s |
24.601ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
22.070s |
1.670ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
13.394m |
41.583ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
27.632m |
93.258ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
5.323m |
38.610ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.540s |
138.910us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.660s |
337.952us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
2.380m |
5.302ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
3.769m |
33.259ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
3.194m |
28.751ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
2.994m |
21.473ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
3.552m |
4.343ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
8.350s |
1.538ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
2.270s |
126.347us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
4.760s |
264.071us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
0.990s |
54.374us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
19.330s |
1.876ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.560s |
52.210us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
5.223m |
15.980ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.860s |
38.910us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.150s |
14.860us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.620s |
114.797us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.620s |
114.797us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.000s |
46.843us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.830s |
21.860us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.560s |
196.599us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.280s |
89.168us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.000s |
46.843us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.830s |
21.860us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.560s |
196.599us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.280s |
89.168us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.020s |
147.133us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.020s |
147.133us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.020s |
147.133us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.020s |
147.133us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.380s |
832.651us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
1.048m |
4.722ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.700s |
2.208ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.700s |
2.208ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.560s |
52.210us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
39.700s |
10.473ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
2.380m |
5.302ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.020s |
147.133us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
1.048m |
4.722ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
1.048m |
4.722ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
1.048m |
4.722ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
39.700s |
10.473ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.560s |
52.210us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
1.048m |
4.722ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.915m |
2.504ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
39.700s |
10.473ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.493m |
2.032ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |