| V1 |
smoke |
aon_timer_smoke |
0.830s |
495.432us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.670s |
1.017ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.170s |
527.500us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
4.150s |
7.188ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.360s |
559.085us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.940s |
499.419us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.170s |
527.500us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.360s |
559.085us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.840s |
450.468us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.870s |
356.260us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.262m |
61.951ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.270s |
525.667us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.000s |
2.506ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
0.730s |
301.308us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.040s |
424.507us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.830s |
724.468us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.830s |
724.468us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.670s |
1.017ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.170s |
527.500us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.360s |
559.085us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.940s |
1.396ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.670s |
1.017ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.170s |
527.500us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.360s |
559.085us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.940s |
1.396ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.060s |
7.727ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
2.730s |
8.370ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
2.730s |
8.370ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.970s |
656.663us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.400s |
696.165us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
1.180s |
3.552ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.530s |
570.773us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
3.930s |
4.266ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
20.620s |
11.225ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |