| V1 |
smoke |
aon_timer_smoke |
0.870s |
|
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.960s |
|
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.420s |
|
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
13.830s |
|
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.250s |
|
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.420s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.770s |
|
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.010s |
|
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
11.480s |
|
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.430s |
|
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
2.420s |
|
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
0.760s |
|
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.680s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.370s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.370s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.960s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.420s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.320s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.960s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.420s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.320s |
|
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
6.040s |
|
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
1.680s |
|
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
1.680s |
|
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.840s |
|
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.620s |
|
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
7.020s |
|
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.180s |
|
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
3.720s |
|
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
13.120s |
|
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |