ENTROPY_SRC/RNG_4BITS Simulation Results

Thursday November 13 2025 19:23:53 UTC

GitHub Revision: 38a9e0c

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	2.000s	56.375us	1	1	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	1.000s	28.638us	1	1	100.00
V1	csr_rw	entropy_src_csr_rw	2.000s	49.955us	1	1	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	10.000s	986.175us	1	1	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	4.000s	211.869us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	2.000s	44.400us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	2.000s	49.955us	1	1	100.00
		entropy_src_csr_aliasing	4.000s	211.869us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	firmware	entropy_src_smoke	2.000s	56.375us	1	1	100.00
		entropy_src_rng	52.000s	13357.511us	1	1	100.00
		entropy_src_fw_ov	114.000s	13069.271us	1	1	100.00
V2	firmware_mode	entropy_src_fw_ov	114.000s	13069.271us	1	1	100.00
V2	rng_mode	entropy_src_rng	52.000s	13357.511us	1	1	100.00
V2	rng_max_rate	entropy_src_rng_max_rate	461.000s	16014.741us	1	1	100.00
V2	health_checks	entropy_src_rng	52.000s	13357.511us	1	1	100.00
V2	conditioning	entropy_src_rng	52.000s	13357.511us	1	1	100.00
V2	interrupts	entropy_src_rng	52.000s	13357.511us	1	1	100.00
		entropy_src_intr	15.000s	4615.042us	1	1	100.00
V2	alerts	entropy_src_rng	52.000s	13357.511us	1	1	100.00
		entropy_src_functional_alerts	6.000s	1658.362us	1	1	100.00
V2	stress_all	entropy_src_stress_all	169.000s	10260.602us	1	1	100.00
V2	functional_errors	entropy_src_functional_errors	3.000s	54.737us	1	1	100.00
V2	firmware_ov_read_contiguous_data	entropy_src_fw_ov_contiguous	2.000s	48.747us	1	1	100.00
V2	intr_test	entropy_src_intr_test	2.000s	29.789us	1	1	100.00
V2	alert_test	entropy_src_alert_test	2.000s	143.216us	1	1	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	5.000s	178.200us	1	1	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	5.000s	178.200us	1	1	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	1.000s	28.638us	1	1	100.00
		entropy_src_csr_rw	2.000s	49.955us	1	1	100.00
		entropy_src_csr_aliasing	4.000s	211.869us	1	1	100.00
		entropy_src_same_csr_outstanding	2.000s	183.943us	1	1	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	1.000s	28.638us	1	1	100.00
		entropy_src_csr_rw	2.000s	49.955us	1	1	100.00
		entropy_src_csr_aliasing	4.000s	211.869us	1	1	100.00
		entropy_src_same_csr_outstanding	2.000s	183.943us	1	1	100.00
V2		TOTAL			12	12	100.00
V2S	tl_intg_err	entropy_src_tl_intg_err	2.000s	212.634us	1	1	100.00
		entropy_src_sec_cm	3.000s	101.672us	1	1	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	52.000s	13357.511us	1	1	100.00
		entropy_src_cfg_regwen	2.000s	16.500us	1	1	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	52.000s	13357.511us	1	1	100.00
V2S	sec_cm_config_redun	entropy_src_rng	52.000s	13357.511us	1	1	100.00
V2S	sec_cm_intersig_mubi	entropy_src_rng	52.000s	13357.511us	1	1	100.00
		entropy_src_fw_ov	114.000s	13069.271us	1	1	100.00
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	3.000s	54.737us	1	1	100.00
		entropy_src_sec_cm	3.000s	101.672us	1	1	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	3.000s	54.737us	1	1	100.00
		entropy_src_sec_cm	3.000s	101.672us	1	1	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	52.000s	13357.511us	1	1	100.00
V2S	sec_cm_fifo_ctr_redun	entropy_src_functional_errors	3.000s	54.737us	1	1	100.00
		entropy_src_sec_cm	3.000s	101.672us	1	1	100.00
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	3.000s	54.737us	1	1	100.00
		entropy_src_sec_cm	3.000s	101.672us	1	1	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	3.000s	54.737us	1	1	100.00
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	6.000s	1658.362us	1	1	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	2.000s	212.634us	1	1	100.00
V2S		TOTAL			3	3	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	247.000s	18019.127us	1	1	100.00
V3		TOTAL			1	1	100.00
		TOTAL			22	22	100.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
88.67	96.96	92.31	98.01	94.40	76.51	95.83	82.67	54.13