ENTROPY_SRC/RNG_4BITS Simulation Results

Monday November 17 2025 17:01:03 UTC

GitHub Revision: 846e611

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	2.000s	54.231us	1	1	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	2.000s	48.213us	1	1	100.00
V1	csr_rw	entropy_src_csr_rw	2.000s	31.266us	1	1	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	9.000s	989.104us	1	1	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	3.000s	42.867us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	3.000s	363.230us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	2.000s	31.266us	1	1	100.00
		entropy_src_csr_aliasing	3.000s	42.867us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	firmware	entropy_src_smoke	2.000s	54.231us	1	1	100.00
		entropy_src_rng	281.000s	19035.786us	1	1	100.00
		entropy_src_fw_ov	229.000s	13095.000us	1	1	100.00
V2	firmware_mode	entropy_src_fw_ov	229.000s	13095.000us	1	1	100.00
V2	rng_mode	entropy_src_rng	281.000s	19035.786us	1	1	100.00
V2	rng_max_rate	entropy_src_rng_max_rate	185.000s	13109.973us	1	1	100.00
V2	health_checks	entropy_src_rng	281.000s	19035.786us	1	1	100.00
V2	conditioning	entropy_src_rng	281.000s	19035.786us	1	1	100.00
V2	interrupts	entropy_src_rng	281.000s	19035.786us	1	1	100.00
		entropy_src_intr	14.000s	3256.270us	1	1	100.00
V2	alerts	entropy_src_rng	281.000s	19035.786us	1	1	100.00
		entropy_src_functional_alerts	5.000s	2314.615us	1	1	100.00
V2	stress_all	entropy_src_stress_all	62.000s	14773.857us	1	1	100.00
V2	functional_errors	entropy_src_functional_errors	3.000s	149.961us	1	1	100.00
V2	firmware_ov_read_contiguous_data	entropy_src_fw_ov_contiguous	2.000s	134.055us	1	1	100.00
V2	intr_test	entropy_src_intr_test	2.000s	19.330us	1	1	100.00
V2	alert_test	entropy_src_alert_test	2.000s	92.642us	1	1	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	3.000s	78.610us	1	1	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	3.000s	78.610us	1	1	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	2.000s	48.213us	1	1	100.00
		entropy_src_csr_rw	2.000s	31.266us	1	1	100.00
		entropy_src_csr_aliasing	3.000s	42.867us	1	1	100.00
		entropy_src_same_csr_outstanding	3.000s	40.933us	1	1	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	2.000s	48.213us	1	1	100.00
		entropy_src_csr_rw	2.000s	31.266us	1	1	100.00
		entropy_src_csr_aliasing	3.000s	42.867us	1	1	100.00
		entropy_src_same_csr_outstanding	3.000s	40.933us	1	1	100.00
V2		TOTAL			12	12	100.00
V2S	tl_intg_err	entropy_src_tl_intg_err	3.000s	370.957us	1	1	100.00
		entropy_src_sec_cm	3.000s	99.218us	1	1	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	281.000s	19035.786us	1	1	100.00
		entropy_src_cfg_regwen	2.000s	45.159us	1	1	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	281.000s	19035.786us	1	1	100.00
V2S	sec_cm_config_redun	entropy_src_rng	281.000s	19035.786us	1	1	100.00
V2S	sec_cm_intersig_mubi	entropy_src_rng	281.000s	19035.786us	1	1	100.00
		entropy_src_fw_ov	229.000s	13095.000us	1	1	100.00
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	3.000s	149.961us	1	1	100.00
		entropy_src_sec_cm	3.000s	99.218us	1	1	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	3.000s	149.961us	1	1	100.00
		entropy_src_sec_cm	3.000s	99.218us	1	1	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	281.000s	19035.786us	1	1	100.00
V2S	sec_cm_fifo_ctr_redun	entropy_src_functional_errors	3.000s	149.961us	1	1	100.00
		entropy_src_sec_cm	3.000s	99.218us	1	1	100.00
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	3.000s	149.961us	1	1	100.00
		entropy_src_sec_cm	3.000s	99.218us	1	1	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	3.000s	149.961us	1	1	100.00
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	5.000s	2314.615us	1	1	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	3.000s	370.957us	1	1	100.00
V2S		TOTAL			3	3	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	235.000s	15018.615us	1	1	100.00
V3		TOTAL			1	1	100.00
		TOTAL			22	22	100.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
89.10	96.92	92.26	97.98	93.13	76.41	95.83	83.17	59.55