| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
176.870s |
4489.552us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
176.870s |
4489.552us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
0 |
1 |
0.00 |
|
chip_sw_sleep_pin_mio_dio_val |
190.120s |
3243.588us |
0 |
1 |
0.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
237.790s |
5834.669us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
161.190s |
3725.311us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
101.670s |
2615.957us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
167.520s |
4269.397us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
304.840s |
5405.523us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
780.220s |
12573.896us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
166.270s |
3197.506us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
734.000s |
8932.193us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
372.470s |
5313.003us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
372.470s |
5313.003us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
638.030s |
7506.060us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
0 |
1 |
0.00 |
|
chip_sw_ast_clk_rst_inputs |
1943.230s |
20180.035us |
0 |
1 |
0.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
370.660s |
4624.225us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
548.020s |
5954.037us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3466.990s |
18463.562us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
182.450s |
2782.432us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
586.040s |
6468.940us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
158.140s |
3111.905us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1200.260s |
9916.860us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
165.010s |
2619.404us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
367.900s |
5227.787us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
105.230s |
2908.955us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
189.860s |
3387.933us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
375.570s |
6696.160us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
264.650s |
5028.447us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
144.640s |
2808.617us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
264.650s |
5028.447us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
110.500s |
2419.545us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
161.160s |
3009.108us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
225.830s |
3492.817us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
193.250s |
3336.653us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
113.660s |
2532.394us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
791.700s |
6715.566us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
144.150s |
2754.423us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
168.060s |
2738.074us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
181.630s |
3076.717us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
848.500s |
7515.285us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
243.930s |
5236.870us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
183.680s |
5701.739us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
112.590s |
2487.730us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
124.750s |
2301.029us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
131.230s |
2731.676us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
114.160s |
2186.400us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
139.090s |
2844.055us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
116.850s |
2868.221us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
264.140s |
3828.385us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
8052.690s |
61020.545us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2612.140s |
15082.275us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
1 |
1 |
100.00 |
|
rom_raw_unlock |
168.820s |
6861.095us |
1 |
1 |
100.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
181.840s |
2734.062us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
157.860s |
3563.238us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
6923.570s |
55363.707us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7586.690s |
56179.644us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
52.850s |
2304.391us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
52.850s |
2304.391us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3811.290s |
28441.597us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1092.860s |
16383.255us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
202.980s |
6067.133us |
1 |
1 |
100.00
|
|
chip_csr_rw |
170.020s |
3942.878us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3811.290s |
28441.597us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1092.860s |
16383.255us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
202.980s |
6067.133us |
1 |
1 |
100.00
|
|
chip_csr_rw |
170.020s |
3942.878us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
6.180s |
76.341us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
4.500s |
58.534us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
45.390s |
7211.387us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
52.190s |
5653.595us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
26.320s |
486.107us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
119.470s |
19171.485us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
140.160s |
15095.124us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
28.820s |
984.682us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
10.720s |
144.285us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
33.500s |
1741.520us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
10.720s |
144.285us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
9.060s |
128.087us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
720.330s |
78558.725us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
29.000s |
1661.450us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
196.170s |
8794.921us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
176.340s |
8919.387us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
308.690s |
2808.238us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
86.250s |
1764.008us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2612.140s |
15082.275us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2309.200s |
31928.802us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2525.760s |
15908.130us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
2024.190s |
10895.400us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2591.160s |
16209.214us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2748.350s |
17438.100us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2700.260s |
16403.846us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2555.760s |
14888.708us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
21.850s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
17.790s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
17.510s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
18.960s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
17.350s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
17.650s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
22.650s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
21.290s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
22.620s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
22.010s |
10.260us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
20.340s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
16.530s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
16.630s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
17.230s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
23.640s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
16.670s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
16.970s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
17.180s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
23.690s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
17.390s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
16.790s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
19.410s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
17.570s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
16.650s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
16.110s |
10.280us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
1925.980s |
12239.057us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2529.280s |
16866.929us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2619.150s |
15604.335us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2454.250s |
16197.872us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2313.090s |
15700.854us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
3 |
3 |
100.00 |
|
rom_e2e_keymgr_init_rom_ext_meas |
2284.570s |
15026.052us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
2364.470s |
15003.325us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2362.180s |
14918.590us |
1 |
1 |
100.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2490.150s |
16194.981us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3168.500s |
34415.081us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3168.500s |
34415.081us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
144.820s |
2688.666us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
182.450s |
2782.432us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
139.020s |
3267.467us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
128.220s |
3420.633us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1009.040s |
9037.492us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
152.940s |
2835.102us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
369.870s |
5464.066us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
391.050s |
5349.682us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
576.140s |
6187.073us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
288.390s |
4306.413us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
377.740s |
4689.646us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
179.260s |
2647.470us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1097.500s |
12466.993us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
166.580s |
2758.439us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
159.660s |
2571.689us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
1041.610s |
8393.499us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
721.680s |
6175.356us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
829.710s |
8489.790us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
7481.340s |
254239.619us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
212.530s |
3568.892us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
243.930s |
5236.870us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
212.530s |
3568.892us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
437.420s |
7964.330us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
437.420s |
7964.330us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
309.140s |
7070.617us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
320.110s |
4439.709us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
554.070s |
5891.271us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
128.220s |
3420.633us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
193.810s |
3647.715us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
144.370s |
2445.610us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
193.160s |
4397.434us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
287.920s |
5319.461us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
270.190s |
5167.601us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
233.600s |
4559.723us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
614.620s |
8973.489us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
319.380s |
3459.115us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
372.240s |
4591.270us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
353.090s |
3967.021us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
387.660s |
4963.766us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
398.750s |
4189.305us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
404.850s |
5243.530us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
638.030s |
7506.060us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
526.010s |
11827.407us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
353.090s |
3967.021us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
387.660s |
4963.766us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
370.660s |
4624.225us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
548.020s |
5954.037us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3466.990s |
18463.562us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
182.450s |
2782.432us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
586.040s |
6468.940us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
158.140s |
3111.905us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1200.260s |
9916.860us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
165.010s |
2619.404us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
367.900s |
5227.787us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
105.230s |
2908.955us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
135.300s |
3358.714us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
356.990s |
5233.550us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
613.990s |
7125.754us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
3017.380s |
24004.120us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
184.460s |
3333.201us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
165.440s |
3239.055us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
682.660s |
7589.761us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
167.410s |
2593.281us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
426.530s |
6191.420us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
982.120s |
17657.521us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
9449.480s |
119251.226us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
638.030s |
7506.060us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
395.660s |
4729.049us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
237.620s |
3186.271us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
391.050s |
5349.682us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
1041.610s |
8393.499us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
852.400s |
6396.086us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
0 |
1 |
0.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
141.750s |
2914.606us |
0 |
1 |
0.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
318.350s |
5003.885us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
162.140s |
2987.751us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
2806.090s |
17150.105us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
145.070s |
2930.956us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
907.340s |
7633.342us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
145.070s |
2930.956us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
852.400s |
6396.086us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
112.890s |
2690.486us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1212.720s |
21750.367us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
650.490s |
5914.453us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
548.020s |
5954.037us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
327.920s |
3806.473us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
370.660s |
4624.225us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3519.170s |
44027.228us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1212.720s |
21750.367us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
217.060s |
3558.491us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1326.720s |
11226.490us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
265.660s |
3936.567us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3519.170s |
44027.228us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
265.660s |
3936.567us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
265.660s |
3936.567us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
265.660s |
3936.567us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
265.660s |
3936.567us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
391.050s |
5349.682us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
174.660s |
7527.233us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
460.620s |
4686.761us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
442.880s |
6613.150us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
442.880s |
6613.150us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
153.890s |
2892.582us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
158.140s |
3111.905us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
193.810s |
3647.715us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
744.040s |
6174.105us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
296.420s |
3843.369us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
350.590s |
4363.769us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
385.380s |
5365.038us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
370.980s |
4981.730us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
305.730s |
4104.349us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1326.720s |
11226.490us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1200.260s |
9916.860us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
1061.500s |
8881.025us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1009.040s |
9037.492us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2682.000s |
15986.905us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
180.500s |
3060.691us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
146.310s |
2722.797us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
165.010s |
2619.404us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1326.720s |
11226.490us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
139.420s |
2370.199us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
1346.360s |
9984.866us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
144.370s |
2445.610us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
369.870s |
5464.066us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
101.670s |
2615.957us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
304.840s |
5405.523us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
780.220s |
12573.896us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
132.750s |
2969.543us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
1041.240s |
9136.756us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
174.660s |
7527.233us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
117.780s |
5435.234us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
265.660s |
3936.567us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3519.170s |
44027.228us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
223.520s |
3098.625us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
511.390s |
5830.919us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
453.380s |
6316.752us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
559.700s |
6908.006us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1326.720s |
11226.490us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
337.310s |
8432.867us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
309.290s |
7058.833us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
526.010s |
11827.407us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
319.380s |
3459.115us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
372.240s |
4591.270us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
353.090s |
3967.021us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
387.660s |
4963.766us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
398.750s |
4189.305us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
404.850s |
5243.530us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
101.670s |
2615.957us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
304.840s |
5405.523us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
780.220s |
12573.896us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
127.980s |
3169.316us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
84.060s |
2424.140us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
87.880s |
2744.645us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
92.010s |
3621.505us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
117.780s |
5435.234us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1360.440s |
24302.014us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
4059.510s |
46506.428us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
4206.340s |
48649.057us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
435.360s |
9137.694us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3559.020s |
47858.007us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1360.440s |
24302.014us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
83.130s |
2977.392us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
67.180s |
2690.180us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
65.930s |
2862.401us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3253.550s |
17065.422us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3466.990s |
18463.562us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
554.070s |
5891.271us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
554.070s |
5891.271us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
554.070s |
5891.271us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
260.610s |
3843.732us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1212.720s |
21750.367us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
260.610s |
3843.732us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1326.720s |
11226.490us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
308.030s |
3587.524us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
149.410s |
2977.804us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1212.720s |
21750.367us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
260.610s |
3843.732us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1326.720s |
11226.490us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
308.030s |
3587.524us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
149.410s |
2977.804us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
342.050s |
5297.071us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
132.750s |
2969.543us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
174.660s |
7527.233us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
223.520s |
3098.625us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
511.390s |
5830.919us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
453.380s |
6316.752us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
559.700s |
6908.006us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
458.470s |
9280.413us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
174.660s |
7527.233us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
978.480s |
8945.128us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
313.190s |
9123.349us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
1097.830s |
25433.879us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
194.110s |
7087.511us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
293.660s |
6808.086us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
433.730s |
7614.387us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
988.560s |
21702.614us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
1 |
2 |
50.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
415.280s |
10727.514us |
0 |
1 |
0.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
437.420s |
7964.330us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
623.800s |
8984.586us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
315.190s |
5251.058us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
313.190s |
9123.349us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
244.760s |
3731.326us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
733.930s |
17409.623us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
263.290s |
6960.759us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
207.030s |
4872.966us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
519.140s |
11843.460us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
483.170s |
6163.751us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
729.530s |
9395.461us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1261.910s |
23538.595us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
185.470s |
3705.623us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
391.050s |
5349.682us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
337.310s |
8432.867us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
337.310s |
8432.867us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
3 |
4 |
75.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
729.530s |
9395.461us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
519.140s |
11843.460us |
0 |
1 |
0.00
|
|
chip_sw_pwrmgr_wdog_reset |
315.190s |
5251.058us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
243.930s |
5236.870us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
245.060s |
4325.743us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
258.070s |
4320.825us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
179.850s |
4219.423us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1097.500s |
12466.993us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
155.140s |
2939.462us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
391.050s |
5349.682us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
721.680s |
6175.356us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
446.450s |
5055.535us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
453.690s |
4795.551us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
157.780s |
2895.476us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
149.410s |
2977.804us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
258.070s |
4320.825us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
258.070s |
4320.825us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
1175.510s |
19593.311us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
932.610s |
13962.632us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
245.060s |
4325.743us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
299.120s |
4358.841us |
1 |
1 |
100.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
301.290s |
6326.245us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
304.840s |
5405.523us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
117.780s |
5435.234us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
576.140s |
6187.073us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
288.390s |
4306.413us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
377.740s |
4689.646us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
128.860s |
3006.825us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
159.540s |
2938.199us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2612.140s |
15082.275us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
373.490s |
5880.968us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
162.210s |
2344.630us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
231.580s |
3428.124us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
161.150s |
2856.666us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
308.030s |
3587.524us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
367.900s |
5227.787us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
438.460s |
7837.214us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
280.420s |
7450.595us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
309.290s |
7058.833us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
391.050s |
5349.682us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
372.470s |
5313.003us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
483.170s |
6163.751us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
1251.530s |
25280.561us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
116.910s |
2272.169us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
179.310s |
3780.221us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
365.870s |
4930.497us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1251.530s |
25280.561us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1251.530s |
25280.561us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
799.860s |
11248.685us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
799.860s |
11248.685us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
237.000s |
6464.296us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
3168.500s |
34415.081us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
98.700s |
2683.839us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
129.670s |
2846.254us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
262.020s |
3715.841us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
327.020s |
3460.395us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
1021.190s |
7601.158us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4968.880s |
31816.514us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1788.060s |
12075.577us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
182.580s |
3629.131us |
1 |
1 |
100.00
|