Simulation Results: flash_ctrl

 
18/11/2025 19:24:33 sha: 7662858 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 94.81
  • line
  • 96.02
  • cond
  • 93.56
  • toggle
  • 97.94
  • fsm
  • 87.07
  • branch
  • 97.15
  • assert
  • 96.53
  • group
  • 95.36
Validation stages
V1
100.00%
V2
98.46%
V2S
97.73%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
flash_ctrl_smoke 48.320s 135.251us 1 1 100.00
smoke_hw 1 1 100.00
flash_ctrl_smoke_hw 10.160s 39.420us 1 1 100.00
csr_hw_reset 1 1 100.00
flash_ctrl_csr_hw_reset 18.860s 49.477us 1 1 100.00
csr_rw 1 1 100.00
flash_ctrl_csr_rw 6.120s 100.053us 1 1 100.00
csr_bit_bash 1 1 100.00
flash_ctrl_csr_bit_bash 29.490s 6447.086us 1 1 100.00
csr_aliasing 1 1 100.00
flash_ctrl_csr_aliasing 34.400s 454.209us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
flash_ctrl_csr_mem_rw_with_rand_reset 6.730s 29.369us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
flash_ctrl_csr_rw 6.120s 100.053us 1 1 100.00
flash_ctrl_csr_aliasing 34.400s 454.209us 1 1 100.00
mem_walk 1 1 100.00
flash_ctrl_mem_walk 5.980s 17.057us 1 1 100.00
mem_partial_access 1 1 100.00
flash_ctrl_mem_partial_access 6.330s 32.197us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sw_op 1 1 100.00
flash_ctrl_sw_op 10.580s 79.770us 1 1 100.00
host_read_direct 1 1 100.00
flash_ctrl_host_dir_rd 9.370s 64.547us 1 1 100.00
rma_hw_if 3 3 100.00
flash_ctrl_hw_rma 1330.100s 337763.905us 1 1 100.00
flash_ctrl_hw_rma_reset 576.360s 40119.880us 1 1 100.00
flash_ctrl_lcmgr_intg 6.030s 22.727us 1 1 100.00
host_controller_arb 1 1 100.00
flash_ctrl_host_ctrl_arb 1779.400s 236519.412us 1 1 100.00
erase_suspend 1 1 100.00
flash_ctrl_erase_suspend 261.410s 13407.551us 1 1 100.00
program_reset 1 1 100.00
flash_ctrl_prog_reset 6.890s 31.857us 1 1 100.00
full_memory_access 1 1 100.00
flash_ctrl_full_mem_access 2557.940s 50873.467us 1 1 100.00
rd_buff_eviction 1 1 100.00
flash_ctrl_rd_buff_evict 37.380s 442.094us 1 1 100.00
rd_buff_eviction_w_ecc 3 3 100.00
flash_ctrl_rw_evict 17.430s 29.474us 1 1 100.00
flash_ctrl_rw_evict_all_en 14.510s 110.533us 1 1 100.00
flash_ctrl_re_evict 21.980s 206.425us 1 1 100.00
host_arb 1 1 100.00
flash_ctrl_phy_arb 21.270s 28.609us 1 1 100.00
host_interleave 1 1 100.00
flash_ctrl_phy_arb 21.270s 28.609us 1 1 100.00
memory_protection 1 1 100.00
flash_ctrl_mp_regions 151.870s 15921.051us 1 1 100.00
fetch_code 1 1 100.00
flash_ctrl_fetch_code 14.100s 633.522us 1 1 100.00
all_partitions 1 1 100.00
flash_ctrl_rand_ops 312.450s 795.736us 1 1 100.00
error_mp 1 1 100.00
flash_ctrl_error_mp 605.460s 13957.166us 1 1 100.00
error_prog_win 1 1 100.00
flash_ctrl_error_prog_win 331.740s 1084.509us 1 1 100.00
error_prog_type 1 1 100.00
flash_ctrl_error_prog_type 806.100s 803.094us 1 1 100.00
error_read_seed 1 1 100.00
flash_ctrl_hw_read_seed_err 5.590s 41.200us 1 1 100.00
read_write_overflow 1 1 100.00
flash_ctrl_oversize_error 134.860s 22257.171us 1 1 100.00
flash_ctrl_disable 1 1 100.00
flash_ctrl_disable 9.190s 92.392us 1 1 100.00
flash_ctrl_connect 1 1 100.00
flash_ctrl_connect 10.280s 19.279us 1 1 100.00
stress_all 1 1 100.00
flash_ctrl_stress_all 23.370s 47.898us 1 1 100.00
secret_partition 2 2 100.00
flash_ctrl_hw_sec_otp 46.790s 903.472us 1 1 100.00
flash_ctrl_otp_reset 50.720s 48.727us 1 1 100.00
isolation_partition 1 1 100.00
flash_ctrl_hw_rma 1330.100s 337763.905us 1 1 100.00
interrupts 4 4 100.00
flash_ctrl_intr_rd 80.590s 1211.067us 1 1 100.00
flash_ctrl_intr_wr 45.960s 8468.279us 1 1 100.00
flash_ctrl_intr_rd_slow_flash 172.630s 46798.528us 1 1 100.00
flash_ctrl_intr_wr_slow_flash 195.590s 236008.443us 1 1 100.00
invalid_op 1 1 100.00
flash_ctrl_invalid_op 47.800s 827.844us 1 1 100.00
mid_op_rst 1 1 100.00
flash_ctrl_mid_op_rst 32.610s 859.154us 1 1 100.00
double_bit_err 5 5 100.00
flash_ctrl_read_word_sweep_derr 18.360s 47.456us 1 1 100.00
flash_ctrl_ro_derr 77.360s 524.527us 1 1 100.00
flash_ctrl_rw_derr 176.810s 4633.875us 1 1 100.00
flash_ctrl_derr_detect 111.080s 867.002us 1 1 100.00
flash_ctrl_integrity 400.880s 17476.074us 1 1 100.00
single_bit_err 3 3 100.00
flash_ctrl_read_word_sweep_serr 14.360s 46.749us 1 1 100.00
flash_ctrl_ro_serr 88.910s 779.380us 1 1 100.00
flash_ctrl_rw_serr 168.000s 5758.027us 1 1 100.00
singlebit_err_counter 1 1 100.00
flash_ctrl_serr_counter 68.580s 3671.570us 1 1 100.00
singlebit_err_address 1 1 100.00
flash_ctrl_serr_address 47.180s 1319.243us 1 1 100.00
scramble 4 5 80.00
flash_ctrl_wo 133.580s 4849.911us 1 1 100.00
flash_ctrl_write_word_sweep 6.740s 50.276us 1 1 100.00
flash_ctrl_read_word_sweep 7.520s 147.170us 1 1 100.00
flash_ctrl_ro 74.030s 846.277us 1 1 100.00
flash_ctrl_rw 18.080s 468.643us 0 1 0.00
filesystem_support 1 1 100.00
flash_ctrl_fs_sup 21.470s 304.957us 1 1 100.00
rma_write_process_error 2 2 100.00
flash_ctrl_rma_err 627.700s 182045.067us 1 1 100.00
flash_ctrl_hw_prog_rma_wipe_err 81.620s 10051.133us 1 1 100.00
alert_test 1 1 100.00
flash_ctrl_alert_test 6.860s 43.101us 1 1 100.00
intr_test 1 1 100.00
flash_ctrl_intr_test 5.240s 25.848us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
flash_ctrl_tl_errors 7.990s 75.516us 1 1 100.00
tl_d_illegal_access 1 1 100.00
flash_ctrl_tl_errors 7.990s 75.516us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
flash_ctrl_csr_hw_reset 18.860s 49.477us 1 1 100.00
flash_ctrl_csr_rw 6.120s 100.053us 1 1 100.00
flash_ctrl_csr_aliasing 34.400s 454.209us 1 1 100.00
flash_ctrl_same_csr_outstanding 21.060s 184.445us 1 1 100.00
tl_d_partial_access 4 4 100.00
flash_ctrl_csr_hw_reset 18.860s 49.477us 1 1 100.00
flash_ctrl_csr_rw 6.120s 100.053us 1 1 100.00
flash_ctrl_csr_aliasing 34.400s 454.209us 1 1 100.00
flash_ctrl_same_csr_outstanding 21.060s 184.445us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
flash_ctrl_shadow_reg_errors 19.710s 77.635us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
flash_ctrl_shadow_reg_errors 19.710s 77.635us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
flash_ctrl_shadow_reg_errors 19.710s 77.635us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
flash_ctrl_shadow_reg_errors 19.710s 77.635us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
flash_ctrl_shadow_reg_errors_with_csr_rw 36.970s 254.522us 1 1 100.00
tl_intg_err 2 2 100.00
flash_ctrl_tl_intg_err 179.440s 1523.735us 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
sec_cm_reg_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 179.440s 1523.735us 1 1 100.00
sec_cm_host_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 179.440s 1523.735us 1 1 100.00
sec_cm_mem_bus_integrity 2 2 100.00
flash_ctrl_rd_intg 14.340s 65.462us 1 1 100.00
flash_ctrl_wr_intg 6.310s 86.428us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
flash_ctrl_smoke 48.320s 135.251us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 4 4 100.00
flash_ctrl_otp_reset 50.720s 48.727us 1 1 100.00
flash_ctrl_disable 9.190s 92.392us 1 1 100.00
flash_ctrl_sec_info_access 41.760s 18553.312us 1 1 100.00
flash_ctrl_connect 10.280s 19.279us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
flash_ctrl_config_regwen 5.670s 85.555us 1 1 100.00
sec_cm_data_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 6.120s 100.053us 1 1 100.00
sec_cm_data_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 19.710s 77.635us 1 1 100.00
sec_cm_info_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 6.120s 100.053us 1 1 100.00
sec_cm_info_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 19.710s 77.635us 1 1 100.00
sec_cm_bank_config_regwen 1 1 100.00
flash_ctrl_csr_rw 6.120s 100.053us 1 1 100.00
sec_cm_bank_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 19.710s 77.635us 1 1 100.00
sec_cm_mem_ctrl_global_esc 1 1 100.00
flash_ctrl_disable 9.190s 92.392us 1 1 100.00
sec_cm_mem_ctrl_local_esc 2 2 100.00
flash_ctrl_rd_intg 14.340s 65.462us 1 1 100.00
flash_ctrl_access_after_disable 5.990s 63.442us 1 1 100.00
sec_cm_mem_addr_infection 1 1 100.00
flash_ctrl_host_addr_infection 11.180s 27.928us 1 1 100.00
sec_cm_mem_disable_config_mubi 1 1 100.00
flash_ctrl_disable 9.190s 92.392us 1 1 100.00
sec_cm_exec_config_redun 1 1 100.00
flash_ctrl_fetch_code 14.100s 633.522us 1 1 100.00
sec_cm_mem_scramble 0 1 0.00
flash_ctrl_rw 18.080s 468.643us 0 1 0.00
sec_cm_mem_integrity 3 3 100.00
flash_ctrl_rw_serr 168.000s 5758.027us 1 1 100.00
flash_ctrl_rw_derr 176.810s 4633.875us 1 1 100.00
flash_ctrl_integrity 400.880s 17476.074us 1 1 100.00
sec_cm_rma_entry_mem_sec_wipe 1 1 100.00
flash_ctrl_hw_rma 1330.100s 337763.905us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
sec_cm_phy_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
sec_cm_phy_prog_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
sec_cm_phy_arbiter_ctrl_redun 1 1 100.00
flash_ctrl_phy_arb_redun 12.120s 711.888us 1 1 100.00
sec_cm_phy_host_grant_ctrl_consistency 1 1 100.00
flash_ctrl_phy_host_grant_err 5.700s 39.299us 1 1 100.00
sec_cm_phy_ack_ctrl_consistency 1 1 100.00
flash_ctrl_phy_ack_consistency 5.980s 76.237us 1 1 100.00
sec_cm_fifo_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
sec_cm_mem_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
sec_cm_prog_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1521.520s 8216.353us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
asymmetric_read_path 1 1 100.00
flash_ctrl_rd_ooo 20.100s 130.701us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
flash_ctrl_basic_rw 275.190s 2288.113us 1 1 100.00