| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
174.700s |
5388.311us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
174.700s |
5388.311us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
0 |
1 |
0.00 |
|
chip_sw_sleep_pin_mio_dio_val |
171.930s |
2963.618us |
0 |
1 |
0.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
249.710s |
5580.836us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
186.060s |
3650.823us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
249.860s |
4730.379us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
253.290s |
5331.919us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
181.460s |
3644.523us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
1186.470s |
17433.450us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
188.810s |
3088.587us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
832.170s |
8411.639us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
385.000s |
6005.469us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
385.000s |
6005.469us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
555.160s |
7093.851us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_rst_inputs |
2469.910s |
24973.916us |
1 |
1 |
100.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
307.990s |
3322.908us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
593.240s |
6420.956us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3428.710s |
18941.453us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
186.040s |
3111.806us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
753.610s |
6599.847us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
173.350s |
3312.683us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
807.430s |
8083.160us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
173.380s |
3579.939us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
324.220s |
4237.339us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
137.020s |
2383.635us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
217.080s |
3066.321us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
191.070s |
3791.142us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
238.330s |
4294.020us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
176.220s |
2854.262us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
238.330s |
4294.020us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
198.550s |
2974.715us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
132.020s |
2472.160us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
182.210s |
3096.774us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
160.810s |
2674.047us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
136.770s |
3293.116us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
630.420s |
6081.830us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
127.230s |
3004.998us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
170.410s |
3109.335us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
150.200s |
3370.320us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
1370.400s |
11480.131us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
263.680s |
5854.132us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
232.720s |
5671.320us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
159.320s |
3154.954us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
189.340s |
3743.198us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
132.920s |
3201.755us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
157.050s |
2598.631us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
164.800s |
2322.677us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
104.670s |
2430.580us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
289.130s |
4232.291us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
7988.190s |
62460.585us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2534.570s |
15530.604us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
1 |
1 |
100.00 |
|
rom_raw_unlock |
159.340s |
5685.276us |
1 |
1 |
100.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
199.860s |
3418.927us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
144.630s |
2822.920us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
6780.420s |
53745.504us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
6920.400s |
56539.342us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
49.280s |
2401.986us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
49.280s |
2401.986us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3137.380s |
27718.452us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1205.390s |
15499.825us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
218.350s |
6886.521us |
1 |
1 |
100.00
|
|
chip_csr_rw |
331.420s |
6194.728us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3137.380s |
27718.452us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1205.390s |
15499.825us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
218.350s |
6886.521us |
1 |
1 |
100.00
|
|
chip_csr_rw |
331.420s |
6194.728us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
4.370s |
38.085us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
6.120s |
43.277us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
43.910s |
6846.195us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
44.900s |
3908.436us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
6.330s |
64.546us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
44.670s |
6638.942us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
66.500s |
7635.936us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
15.310s |
122.061us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
17.810s |
258.472us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
25.190s |
541.183us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
17.810s |
258.472us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
34.690s |
725.551us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
772.800s |
86428.023us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
25.350s |
1283.460us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
387.130s |
18592.326us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
145.670s |
3415.673us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
106.890s |
447.161us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
15.150s |
59.270us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2534.570s |
15530.604us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2474.160s |
39644.228us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2616.660s |
15037.252us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
2030.380s |
11631.755us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2693.750s |
15482.364us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2572.050s |
16882.694us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2463.680s |
15768.434us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2507.530s |
15699.595us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
27.890s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
21.520s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
22.870s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
17.220s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
17.390s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
29.180s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
22.570s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
25.000s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
16.980s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
16.360s |
10.400us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
16.350s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
16.280s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
16.000s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
17.170s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
16.560s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
17.430s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
18.370s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
29.270s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
17.060s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
18.400s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
23.860s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
18.040s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
17.670s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
17.150s |
10.200us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
20.280s |
10.100us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
2010.060s |
12110.459us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2535.470s |
15521.766us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2474.230s |
15580.413us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2536.540s |
17350.806us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2481.450s |
15132.337us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
3 |
3 |
100.00 |
|
rom_e2e_keymgr_init_rom_ext_meas |
2373.300s |
15212.653us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
2400.170s |
14785.727us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2290.010s |
15568.501us |
1 |
1 |
100.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2438.710s |
16173.786us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2964.990s |
35266.508us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2964.990s |
35266.508us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
147.160s |
2985.479us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
186.040s |
3111.806us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
192.030s |
2927.566us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
115.970s |
2413.498us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1403.170s |
11759.107us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
138.680s |
2782.620us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
251.710s |
4778.466us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.080s |
5231.702us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
542.760s |
5165.843us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
247.550s |
3412.105us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
332.760s |
4031.415us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
149.100s |
2868.989us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1005.140s |
14266.355us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
314.790s |
5643.285us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
153.920s |
2747.252us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
858.380s |
7809.485us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
1110.500s |
8178.289us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
836.110s |
8268.051us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
7625.920s |
255894.093us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
243.040s |
3543.405us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
263.680s |
5854.132us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
243.040s |
3543.405us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
342.000s |
7157.005us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
342.000s |
7157.005us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
236.240s |
6373.501us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
314.030s |
5096.500us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
595.260s |
6489.587us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
115.970s |
2413.498us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
165.510s |
2524.848us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
130.640s |
2589.713us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
230.120s |
3797.835us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
265.360s |
4155.251us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
266.450s |
3867.317us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
206.130s |
4233.609us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
837.560s |
10174.953us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
336.080s |
3624.606us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
351.470s |
5329.434us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
350.620s |
4444.114us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
359.570s |
4509.654us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
393.910s |
4109.200us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
366.360s |
5140.965us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
555.160s |
7093.851us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
330.220s |
7253.335us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
350.620s |
4444.114us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
359.570s |
4509.654us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
307.990s |
3322.908us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
593.240s |
6420.956us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3428.710s |
18941.453us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
186.040s |
3111.806us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
753.610s |
6599.847us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
173.350s |
3312.683us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
807.430s |
8083.160us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
173.380s |
3579.939us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
324.220s |
4237.339us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
137.020s |
2383.635us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
108.300s |
3346.050us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
409.940s |
4522.469us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
674.240s |
7722.379us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
3098.860s |
24719.982us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
142.380s |
2975.789us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
129.410s |
2994.479us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
934.340s |
10213.321us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
166.000s |
3111.016us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
309.170s |
4199.637us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1247.070s |
23552.551us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
10965.170s |
131666.280us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
555.160s |
7093.851us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
303.210s |
4256.782us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
241.860s |
3360.972us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.080s |
5231.702us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
858.380s |
7809.485us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
889.540s |
6920.268us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
0 |
1 |
0.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
163.150s |
2919.093us |
0 |
1 |
0.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
323.670s |
6047.350us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
149.720s |
3190.599us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
3031.780s |
17992.761us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
127.940s |
3150.263us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
644.210s |
5588.663us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
127.940s |
3150.263us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
889.540s |
6920.268us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
144.520s |
3179.874us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1216.860s |
19513.990us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
623.430s |
5840.707us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
593.240s |
6420.956us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
315.440s |
4302.510us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
307.990s |
3322.908us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3744.830s |
43198.410us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1216.860s |
19513.990us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
162.830s |
3027.131us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1503.200s |
11446.999us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
270.330s |
4243.138us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3744.830s |
43198.410us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
270.330s |
4243.138us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
270.330s |
4243.138us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
270.330s |
4243.138us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
270.330s |
4243.138us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.080s |
5231.702us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
130.220s |
5607.793us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
526.120s |
4532.214us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
362.460s |
4875.713us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
362.460s |
4875.713us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
184.970s |
3086.396us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
173.350s |
3312.683us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
165.510s |
2524.848us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
1546.090s |
11510.126us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
286.100s |
4088.707us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
401.480s |
4202.710us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
420.910s |
5506.302us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
457.710s |
5608.704us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
327.950s |
4594.084us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1503.200s |
11446.999us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
807.430s |
8083.160us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
953.100s |
7932.578us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1403.170s |
11759.107us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2575.660s |
14556.738us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
171.990s |
3317.378us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
143.750s |
3464.142us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
173.380s |
3579.939us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1503.200s |
11446.999us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
101.400s |
2430.591us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
1218.990s |
9578.459us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
130.640s |
2589.713us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
251.710s |
4778.466us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
249.860s |
4730.379us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
181.460s |
3644.523us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
1186.470s |
17433.450us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
155.050s |
2888.616us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
1607.120s |
12986.803us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
130.220s |
5607.793us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
141.160s |
8141.222us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
270.330s |
4243.138us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3744.830s |
43198.410us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
221.020s |
3830.620us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
576.480s |
6825.129us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
545.160s |
8317.452us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
463.130s |
5577.356us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1503.200s |
11446.999us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
293.960s |
8996.778us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
603.930s |
7699.262us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
330.220s |
7253.335us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
336.080s |
3624.606us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
351.470s |
5329.434us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
350.620s |
4444.114us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
359.570s |
4509.654us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
393.910s |
4109.200us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
366.360s |
5140.965us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
249.860s |
4730.379us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
181.460s |
3644.523us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
1186.470s |
17433.450us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
179.770s |
3902.685us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
71.600s |
2936.123us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
76.930s |
2439.744us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
104.680s |
3581.963us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
141.160s |
8141.222us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1549.440s |
34370.060us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
4090.160s |
47223.063us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
4022.830s |
47418.537us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
635.370s |
9950.706us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3773.150s |
46590.754us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1549.440s |
34370.060us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
68.970s |
2414.364us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
60.870s |
2114.211us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
51.360s |
1693.027us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3239.780s |
17268.298us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3428.710s |
18941.453us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
595.260s |
6489.587us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
595.260s |
6489.587us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
595.260s |
6489.587us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
300.940s |
3105.463us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1216.860s |
19513.990us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
300.940s |
3105.463us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1503.200s |
11446.999us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
341.920s |
4447.922us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
125.410s |
3172.286us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1216.860s |
19513.990us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
300.940s |
3105.463us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1503.200s |
11446.999us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
341.920s |
4447.922us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
125.410s |
3172.286us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
240.850s |
5561.428us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
155.050s |
2888.616us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
130.220s |
5607.793us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
221.020s |
3830.620us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
576.480s |
6825.129us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
545.160s |
8317.452us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
463.130s |
5577.356us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
616.900s |
12493.136us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
130.220s |
5607.793us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
1104.800s |
8566.175us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
308.640s |
8066.803us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
1164.040s |
28384.837us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
263.860s |
7673.062us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
330.160s |
7555.882us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
284.890s |
5288.589us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1247.690s |
26451.432us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
0 |
2 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
412.180s |
9727.406us |
0 |
1 |
0.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
342.000s |
7157.005us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
854.190s |
11338.311us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
353.690s |
3950.076us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
308.640s |
8066.803us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
161.110s |
3809.711us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1691.040s |
30636.971us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
290.680s |
7693.455us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
285.090s |
5434.134us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1367.440s |
20404.196us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
531.540s |
7762.310us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
838.460s |
9807.188us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1180.740s |
20897.225us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
144.960s |
2444.201us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.080s |
5231.702us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
293.960s |
8996.778us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
293.960s |
8996.778us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
4 |
4 |
100.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
838.460s |
9807.188us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1367.440s |
20404.196us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_wdog_reset |
353.690s |
3950.076us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
263.680s |
5854.132us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
250.910s |
4195.061us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
255.660s |
4149.119us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
175.180s |
3592.581us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1005.140s |
14266.355us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
144.930s |
3086.137us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.080s |
5231.702us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
1110.500s |
8178.289us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
448.530s |
4530.419us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
511.540s |
4996.546us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
178.410s |
2916.191us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
125.410s |
3172.286us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
255.660s |
4149.119us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
255.660s |
4149.119us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
341.450s |
6047.932us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
871.000s |
13289.293us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
250.910s |
4195.061us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
263.880s |
4996.201us |
1 |
1 |
100.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
334.870s |
6517.737us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
181.460s |
3644.523us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
141.160s |
8141.222us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
542.760s |
5165.843us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
247.550s |
3412.105us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
332.760s |
4031.415us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
115.040s |
3155.415us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
167.790s |
3559.020us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2534.570s |
15530.604us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
602.160s |
9216.671us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
155.110s |
2822.357us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
183.040s |
3399.708us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
124.000s |
2796.504us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
341.920s |
4447.922us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
324.220s |
4237.339us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
457.230s |
7647.382us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
467.130s |
8221.141us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
603.930s |
7699.262us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
397.080s |
5231.702us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
385.000s |
6005.469us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
1 |
2 |
50.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
531.540s |
7762.310us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
860.690s |
23278.664us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
163.080s |
3053.536us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
253.570s |
3942.594us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
326.100s |
4747.198us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_reset |
860.690s |
23278.664us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_reset |
860.690s |
23278.664us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
639.100s |
11296.068us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
639.100s |
11296.068us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
244.210s |
6614.725us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2964.990s |
35266.508us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
148.920s |
2691.091us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
108.800s |
2708.890us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
250.720s |
4269.517us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
299.440s |
3412.632us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
1108.920s |
8568.668us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4948.790s |
31756.830us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1858.460s |
12196.738us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
113.530s |
2537.647us |
1 |
1 |
100.00
|