Simulation Results: lc_ctrl

 
19/11/2025 18:29:58 sha: 395232b json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 85.93
  • line
  • 96.93
  • cond
  • 78.8
  • toggle
  • 80.56
  • fsm
  • 72.63
  • branch
  • 93.32
  • assert
  • 93.85
  • group
  • 85.41
Validation stages
V1
100.00%
V2
82.50%
V2S
64.29%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
lc_ctrl_smoke 1.790s 63.607us 2 2 100.00
csr_hw_reset 2 2 100.00
lc_ctrl_csr_hw_reset 1.380s 40.888us 2 2 100.00
csr_rw 2 2 100.00
lc_ctrl_csr_rw 0.950s 64.499us 2 2 100.00
csr_bit_bash 2 2 100.00
lc_ctrl_csr_bit_bash 2.260s 67.152us 2 2 100.00
csr_aliasing 2 2 100.00
lc_ctrl_csr_aliasing 1.090s 17.845us 2 2 100.00
csr_mem_rw_with_rand_reset 2 2 100.00
lc_ctrl_csr_mem_rw_with_rand_reset 1.360s 74.582us 2 2 100.00
regwen_csr_and_corresponding_lockable_csr 4 4 100.00
lc_ctrl_csr_rw 0.950s 64.499us 2 2 100.00
lc_ctrl_csr_aliasing 1.090s 17.845us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
state_post_trans 0 2 0.00
lc_ctrl_state_post_trans 3.770s 66.882us 0 2 0.00
regwen_during_op 2 2 100.00
lc_ctrl_regwen_during_op 11.460s 275.500us 2 2 100.00
rand_wr_claim_transition_if 2 2 100.00
lc_ctrl_claim_transition_if 1.140s 22.639us 2 2 100.00
lc_prog_failure 2 2 100.00
lc_ctrl_prog_failure 2.600s 91.773us 2 2 100.00
lc_state_failure 0 2 0.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_errors 1 2 50.00
lc_ctrl_errors 6.670s 1088.455us 1 2 50.00
security_escalation 9 14 64.29
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_prog_failure 2.600s 91.773us 2 2 100.00
lc_ctrl_errors 6.670s 1088.455us 1 2 50.00
lc_ctrl_security_escalation 6.170s 394.526us 2 2 100.00
lc_ctrl_jtag_state_failure 14.450s 2158.529us 0 2 0.00
lc_ctrl_jtag_prog_failure 3.410s 135.223us 2 2 100.00
lc_ctrl_jtag_errors 22.780s 9261.755us 2 2 100.00
jtag_access 24 26 92.31
lc_ctrl_jtag_smoke 6.810s 967.246us 2 2 100.00
lc_ctrl_jtag_state_post_trans 8.480s 1970.859us 0 2 0.00
lc_ctrl_jtag_prog_failure 3.410s 135.223us 2 2 100.00
lc_ctrl_jtag_errors 22.780s 9261.755us 2 2 100.00
lc_ctrl_jtag_access 3.460s 296.738us 2 2 100.00
lc_ctrl_jtag_regwen_during_op 16.830s 936.182us 2 2 100.00
lc_ctrl_jtag_csr_hw_reset 1.790s 194.729us 2 2 100.00
lc_ctrl_jtag_csr_rw 1.850s 61.090us 2 2 100.00
lc_ctrl_jtag_csr_bit_bash 22.970s 2677.702us 2 2 100.00
lc_ctrl_jtag_csr_aliasing 11.910s 2053.535us 2 2 100.00
lc_ctrl_jtag_same_csr_outstanding 1.740s 44.924us 2 2 100.00
lc_ctrl_jtag_csr_mem_rw_with_rand_reset 2.300s 50.551us 2 2 100.00
lc_ctrl_jtag_alert_test 2.110s 158.040us 2 2 100.00
jtag_priority 2 2 100.00
lc_ctrl_jtag_priority 3.180s 234.123us 2 2 100.00
lc_ctrl_volatile_unlock 2 2 100.00
lc_ctrl_volatile_unlock_smoke 1.320s 32.935us 2 2 100.00
stress_all 0 2 0.00
lc_ctrl_stress_all 15.300s 1061.359us 0 2 0.00
alert_test 2 2 100.00
lc_ctrl_alert_test 1.190s 21.378us 2 2 100.00
tl_d_oob_addr_access 2 2 100.00
lc_ctrl_tl_errors 2.360s 106.509us 2 2 100.00
tl_d_illegal_access 2 2 100.00
lc_ctrl_tl_errors 2.360s 106.509us 2 2 100.00
tl_d_outstanding_access 8 8 100.00
lc_ctrl_csr_hw_reset 1.380s 40.888us 2 2 100.00
lc_ctrl_csr_rw 0.950s 64.499us 2 2 100.00
lc_ctrl_csr_aliasing 1.090s 17.845us 2 2 100.00
lc_ctrl_same_csr_outstanding 1.300s 132.720us 2 2 100.00
tl_d_partial_access 8 8 100.00
lc_ctrl_csr_hw_reset 1.380s 40.888us 2 2 100.00
lc_ctrl_csr_rw 0.950s 64.499us 2 2 100.00
lc_ctrl_csr_aliasing 1.090s 17.845us 2 2 100.00
lc_ctrl_same_csr_outstanding 1.300s 132.720us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 4 4 100.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
lc_ctrl_tl_intg_err 3.230s 527.848us 2 2 100.00
sec_cm_bus_integrity 2 2 100.00
lc_ctrl_tl_intg_err 3.230s 527.848us 2 2 100.00
sec_cm_transition_config_regwen 2 2 100.00
lc_ctrl_regwen_during_op 11.460s 275.500us 2 2 100.00
sec_cm_manuf_state_sparse 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_transition_ctr_sparse 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_manuf_state_bkgn_chk 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_transition_ctr_bkgn_chk 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_state_config_sparse 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_main_fsm_sparse 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_kmac_fsm_sparse 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_main_fsm_local_esc 2 4 50.00
lc_ctrl_state_failure 3.260s 147.830us 0 2 0.00
lc_ctrl_sec_cm 6.020s 1584.283us 2 2 100.00
sec_cm_main_fsm_global_esc 2 2 100.00
lc_ctrl_security_escalation 6.170s 394.526us 2 2 100.00
sec_cm_main_ctrl_flow_consistency 0 4 0.00
lc_ctrl_state_post_trans 3.770s 66.882us 0 2 0.00
lc_ctrl_jtag_state_post_trans 8.480s 1970.859us 0 2 0.00
sec_cm_intersig_mubi 2 2 100.00
lc_ctrl_sec_mubi 8.430s 2054.631us 2 2 100.00
sec_cm_token_valid_ctrl_mubi 2 2 100.00
lc_ctrl_sec_mubi 8.430s 2054.631us 2 2 100.00
sec_cm_token_digest 2 2 100.00
lc_ctrl_sec_token_digest 9.150s 10617.895us 2 2 100.00
sec_cm_token_mux_ctrl_redun 2 2 100.00
lc_ctrl_sec_token_mux 7.140s 330.450us 2 2 100.00
sec_cm_token_valid_mux_redun 2 2 100.00
lc_ctrl_sec_token_mux 7.140s 330.450us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 2 0.00
lc_ctrl_stress_all_with_rand_reset 7.680s 1202.800us 0 2 0.00