| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
143.840s |
4026.673us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
143.840s |
4026.673us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_mio_dio_val |
195.340s |
3693.668us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
184.610s |
2867.317us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
121.390s |
3155.497us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
1153.420s |
16196.762us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
640.210s |
9644.103us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
424.540s |
7672.283us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
917.950s |
15086.154us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
180.380s |
3329.476us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
871.190s |
9840.969us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
419.250s |
5732.369us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
419.250s |
5732.369us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
570.190s |
7842.660us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
0 |
1 |
0.00 |
|
chip_sw_ast_clk_rst_inputs |
2116.380s |
21093.499us |
0 |
1 |
0.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
303.510s |
4314.221us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
599.430s |
5524.929us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3370.110s |
18349.773us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
149.500s |
3345.895us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
629.690s |
6144.891us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
179.140s |
3303.749us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1156.090s |
9481.597us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
175.260s |
3463.687us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
356.890s |
5358.801us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
107.590s |
3072.445us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
151.140s |
2338.825us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
648.590s |
7035.180us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
218.470s |
4604.136us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
136.800s |
2981.907us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
218.470s |
4604.136us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
156.210s |
2994.768us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
148.480s |
3054.896us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
141.170s |
3029.022us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
166.490s |
3038.762us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
141.190s |
3057.770us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
624.040s |
6199.542us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
180.030s |
3135.789us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
171.930s |
2681.780us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
199.910s |
3236.754us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
1210.270s |
11229.730us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
177.350s |
5461.781us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
187.050s |
4530.088us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
100.570s |
2678.847us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
147.270s |
2797.213us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
122.500s |
2490.909us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
122.100s |
2888.352us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
104.500s |
3337.521us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
135.690s |
3052.821us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
354.230s |
3942.750us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
7686.190s |
61895.796us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2546.080s |
15434.346us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
1 |
1 |
100.00 |
|
rom_raw_unlock |
133.430s |
5070.547us |
1 |
1 |
100.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
154.000s |
3463.525us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
184.240s |
3017.789us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
7034.880s |
54840.581us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7540.480s |
57300.317us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
43.060s |
2696.983us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
43.060s |
2696.983us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
5343.810s |
41597.670us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2462.050s |
31659.706us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
132.140s |
4288.189us |
1 |
1 |
100.00
|
|
chip_csr_rw |
208.860s |
3981.757us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
5343.810s |
41597.670us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
2462.050s |
31659.706us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
132.140s |
4288.189us |
1 |
1 |
100.00
|
|
chip_csr_rw |
208.860s |
3981.757us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
8.940s |
122.250us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
4.950s |
50.546us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
43.050s |
6852.585us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
43.680s |
4996.693us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
19.470s |
335.061us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
318.320s |
53864.150us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
175.290s |
20630.615us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
13.170s |
149.573us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
17.990s |
284.806us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
51.410s |
2321.767us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
17.990s |
284.806us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
13.100s |
249.415us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
497.870s |
56901.955us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
21.420s |
1123.119us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
195.490s |
9778.943us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
115.950s |
2617.047us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
358.340s |
9784.786us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
15.050s |
27.795us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2546.080s |
15434.346us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2222.310s |
27669.936us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2488.300s |
14558.082us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
1965.510s |
11173.801us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2553.530s |
15752.438us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2625.460s |
15706.364us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2681.110s |
15630.639us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2495.180s |
14958.837us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
16.360s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
26.830s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
17.250s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
21.340s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
20.640s |
10.140us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
18.480s |
10.140us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
17.840s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
16.880s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
17.160s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
18.050s |
10.120us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
18.680s |
10.220us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
22.090s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
17.510s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
17.390s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
17.000s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
17.260s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
29.040s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
26.170s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
20.760s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
18.300s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
20.940s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
22.600s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
16.750s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
17.660s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
16.620s |
10.240us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
1950.500s |
11146.497us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2418.000s |
15173.710us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2381.780s |
16034.159us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2528.270s |
15660.990us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2316.710s |
14962.628us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
3 |
3 |
100.00 |
|
rom_e2e_keymgr_init_rom_ext_meas |
2256.080s |
14847.975us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
2469.330s |
16061.838us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2325.180s |
14325.393us |
1 |
1 |
100.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2379.070s |
16641.624us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2772.700s |
35413.261us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2772.700s |
35413.261us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
161.590s |
2699.533us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
149.500s |
3345.895us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
126.510s |
2453.904us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
209.120s |
3115.049us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1531.280s |
11942.576us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
154.490s |
3235.083us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
318.970s |
5863.195us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.910s |
5205.417us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
505.770s |
4924.383us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
259.440s |
3735.997us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
368.890s |
4338.081us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
178.360s |
3064.696us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
944.340s |
10975.518us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
311.560s |
4903.268us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
163.090s |
2949.729us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
1163.770s |
8730.503us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
770.770s |
6487.962us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
783.780s |
7870.950us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
8422.720s |
255324.175us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
236.820s |
4100.276us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
177.350s |
5461.781us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
236.820s |
4100.276us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
376.510s |
7179.398us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
0 |
1 |
0.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
376.510s |
7179.398us |
0 |
1 |
0.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
197.620s |
7366.194us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
382.820s |
5125.569us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
536.700s |
5792.732us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
209.120s |
3115.049us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
178.330s |
3060.847us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
160.270s |
2640.753us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
230.610s |
3673.093us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
222.070s |
3248.060us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
317.980s |
5560.241us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
201.490s |
3176.003us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
876.670s |
10905.553us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
357.000s |
4478.566us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
359.930s |
4636.957us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
342.220s |
3623.523us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
342.530s |
4425.900us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
416.180s |
4232.372us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
397.620s |
5158.850us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
570.190s |
7842.660us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
260.250s |
6253.620us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
342.220s |
3623.523us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
342.530s |
4425.900us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
303.510s |
4314.221us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
599.430s |
5524.929us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3370.110s |
18349.773us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
149.500s |
3345.895us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
629.690s |
6144.891us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
179.140s |
3303.749us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1156.090s |
9481.597us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
175.260s |
3463.687us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
356.890s |
5358.801us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
107.590s |
3072.445us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
100.710s |
2435.716us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
368.200s |
5263.479us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
663.000s |
6387.163us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
3106.550s |
24760.169us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
133.750s |
2489.232us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
124.790s |
2454.530us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
658.050s |
7797.589us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
171.400s |
3449.508us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
327.440s |
5288.721us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1112.040s |
21187.578us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
4190.410s |
42296.160us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
570.190s |
7842.660us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
396.520s |
5010.269us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
247.070s |
3105.396us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.910s |
5205.417us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
1163.770s |
8730.503us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
821.550s |
6154.072us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
0 |
1 |
0.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
108.210s |
2670.163us |
0 |
1 |
0.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
303.620s |
5127.457us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
204.100s |
2526.930us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
4046.220s |
24892.944us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
159.340s |
3170.445us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
628.910s |
6619.902us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
159.340s |
3170.445us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
821.550s |
6154.072us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
132.020s |
3056.549us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1501.670s |
21654.537us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
515.560s |
5636.320us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
599.430s |
5524.929us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
337.090s |
3779.595us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
303.510s |
4314.221us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3546.760s |
43991.661us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1501.670s |
21654.537us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
173.030s |
3656.452us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
713.960s |
6934.471us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
266.430s |
4943.168us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3546.760s |
43991.661us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
266.430s |
4943.168us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
266.430s |
4943.168us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
266.430s |
4943.168us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
266.430s |
4943.168us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.910s |
5205.417us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
273.230s |
12160.848us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
550.320s |
4580.318us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
298.550s |
4949.344us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
298.550s |
4949.344us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
172.540s |
2991.195us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
179.140s |
3303.749us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
178.330s |
3060.847us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
637.270s |
5643.118us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
320.440s |
3715.080us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
410.440s |
5214.134us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
483.540s |
5392.626us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
376.700s |
5213.677us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
318.700s |
3519.100us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
713.960s |
6934.471us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
1156.090s |
9481.597us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
840.750s |
7971.710us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1531.280s |
11942.576us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2125.940s |
11313.196us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
132.600s |
2854.167us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
167.670s |
3660.440us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
175.260s |
3463.687us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
713.960s |
6934.471us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
147.770s |
2971.642us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
1007.500s |
7902.495us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
160.270s |
2640.753us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
318.970s |
5863.195us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
1153.420s |
16196.762us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
424.540s |
7672.283us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
917.950s |
15086.154us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
122.310s |
3241.827us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
710.380s |
7937.687us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
273.230s |
12160.848us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
149.920s |
6509.374us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
266.430s |
4943.168us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3546.760s |
43991.661us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
179.880s |
2450.059us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
528.240s |
7158.324us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
615.830s |
6923.971us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
589.770s |
8055.306us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
713.960s |
6934.471us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
326.790s |
8620.822us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
437.930s |
7271.713us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
260.250s |
6253.620us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
357.000s |
4478.566us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
359.930s |
4636.957us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
342.220s |
3623.523us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
342.530s |
4425.900us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
416.180s |
4232.372us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
397.620s |
5158.850us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
1153.420s |
16196.762us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
424.540s |
7672.283us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
917.950s |
15086.154us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
152.210s |
3865.257us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
102.910s |
4005.318us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
111.390s |
3729.973us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
99.890s |
3330.515us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
149.920s |
6509.374us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1431.970s |
23932.411us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
3869.180s |
48621.293us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
3782.840s |
50776.155us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
519.820s |
9548.104us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3778.800s |
48355.117us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1431.970s |
23932.411us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
70.170s |
2633.153us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
58.600s |
2272.595us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
65.830s |
2122.760us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3390.760s |
16567.260us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3370.110s |
18349.773us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
536.700s |
5792.732us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
536.700s |
5792.732us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
536.700s |
5792.732us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
321.960s |
4049.329us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1501.670s |
21654.537us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
321.960s |
4049.329us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
713.960s |
6934.471us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
289.710s |
4519.107us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
141.750s |
2855.484us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1501.670s |
21654.537us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
321.960s |
4049.329us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
713.960s |
6934.471us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
289.710s |
4519.107us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
141.750s |
2855.484us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
316.450s |
4374.705us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
122.310s |
3241.827us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
273.230s |
12160.848us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
179.880s |
2450.059us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
528.240s |
7158.324us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
615.830s |
6923.971us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
589.770s |
8055.306us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
625.470s |
10690.096us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
273.230s |
12160.848us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
1042.230s |
9131.406us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
254.690s |
6206.132us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
1003.110s |
25762.744us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
311.330s |
7417.806us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
222.240s |
7654.632us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
326.880s |
6459.809us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1133.030s |
23122.562us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
0 |
2 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
364.050s |
9250.500us |
0 |
1 |
0.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
376.510s |
7179.398us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
922.060s |
13125.118us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
261.270s |
3604.004us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
254.690s |
6206.132us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
164.860s |
4110.311us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
212.130s |
6053.946us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
299.950s |
7073.947us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
220.130s |
4435.475us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1082.320s |
18231.860us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
697.760s |
8661.396us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
759.940s |
9406.991us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1465.900s |
27887.938us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
146.650s |
2932.728us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.910s |
5205.417us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
326.790s |
8620.822us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
326.790s |
8620.822us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
4 |
4 |
100.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
759.940s |
9406.991us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
1082.320s |
18231.860us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_wdog_reset |
261.270s |
3604.004us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
177.350s |
5461.781us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
310.170s |
4274.076us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
260.720s |
5202.753us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
279.150s |
4859.842us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
944.340s |
10975.518us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
142.790s |
2972.442us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
397.910s |
5205.417us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
770.770s |
6487.962us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
461.080s |
4828.159us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
450.560s |
4206.866us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
164.780s |
2517.689us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
141.750s |
2855.484us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
260.720s |
5202.753us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
260.720s |
5202.753us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
680.810s |
10439.773us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
850.560s |
13329.587us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
310.170s |
4274.076us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
231.930s |
4168.246us |
1 |
1 |
100.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
298.380s |
6275.394us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
424.540s |
7672.283us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
149.920s |
6509.374us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
505.770s |
4924.383us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
259.440s |
3735.997us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
368.890s |
4338.081us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
173.790s |
3102.324us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
141.460s |
2421.613us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2546.080s |
15434.346us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
397.910s |
6060.110us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
187.460s |
3632.694us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
211.400s |
3058.986us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
196.310s |
3336.404us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
289.710s |
4519.107us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
356.890s |
5358.801us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
275.730s |
8403.352us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
500.270s |
8035.261us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
437.930s |
7271.713us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
397.910s |
5205.417us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
419.250s |
5732.369us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
697.760s |
8661.396us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
984.600s |
24004.935us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
132.420s |
3363.259us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
226.240s |
3607.121us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
301.520s |
4312.790us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
984.600s |
24004.935us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
984.600s |
24004.935us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
2420.780s |
20139.461us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
2420.780s |
20139.461us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
328.050s |
6106.706us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2772.700s |
35413.261us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
111.220s |
2942.137us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
118.430s |
2175.092us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
301.820s |
3473.584us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
283.120s |
3195.229us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
1024.660s |
8112.521us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
5253.600s |
32056.977us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1671.350s |
12160.830us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
119.310s |
2941.017us |
1 |
1 |
100.00
|