Simulation Results: flash_ctrl

 
20/11/2025 19:30:26 sha: 1f7db17 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 94.75
  • line
  • 96.01
  • cond
  • 93.98
  • toggle
  • 97.63
  • fsm
  • 86.39
  • branch
  • 97.19
  • assert
  • 96.53
  • group
  • 95.54
Validation stages
V1
100.00%
V2
100.00%
V2S
95.45%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
flash_ctrl_smoke 40.330s 34.173us 1 1 100.00
smoke_hw 1 1 100.00
flash_ctrl_smoke_hw 8.680s 54.713us 1 1 100.00
csr_hw_reset 1 1 100.00
flash_ctrl_csr_hw_reset 18.290s 26.708us 1 1 100.00
csr_rw 1 1 100.00
flash_ctrl_csr_rw 8.530s 148.500us 1 1 100.00
csr_bit_bash 1 1 100.00
flash_ctrl_csr_bit_bash 29.170s 3160.473us 1 1 100.00
csr_aliasing 1 1 100.00
flash_ctrl_csr_aliasing 30.330s 859.022us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
flash_ctrl_csr_mem_rw_with_rand_reset 7.600s 133.268us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
flash_ctrl_csr_rw 8.530s 148.500us 1 1 100.00
flash_ctrl_csr_aliasing 30.330s 859.022us 1 1 100.00
mem_walk 1 1 100.00
flash_ctrl_mem_walk 5.450s 17.752us 1 1 100.00
mem_partial_access 1 1 100.00
flash_ctrl_mem_partial_access 5.650s 44.776us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sw_op 1 1 100.00
flash_ctrl_sw_op 11.690s 92.647us 1 1 100.00
host_read_direct 1 1 100.00
flash_ctrl_host_dir_rd 18.750s 57.603us 1 1 100.00
rma_hw_if 3 3 100.00
flash_ctrl_hw_rma 1224.570s 170016.419us 1 1 100.00
flash_ctrl_hw_rma_reset 526.800s 40122.807us 1 1 100.00
flash_ctrl_lcmgr_intg 5.330s 76.364us 1 1 100.00
host_controller_arb 1 1 100.00
flash_ctrl_host_ctrl_arb 1626.550s 250309.404us 1 1 100.00
erase_suspend 1 1 100.00
flash_ctrl_erase_suspend 228.730s 5510.048us 1 1 100.00
program_reset 1 1 100.00
flash_ctrl_prog_reset 5.820s 21.598us 1 1 100.00
full_memory_access 1 1 100.00
flash_ctrl_full_mem_access 2256.180s 325454.075us 1 1 100.00
rd_buff_eviction 1 1 100.00
flash_ctrl_rd_buff_evict 35.010s 147.509us 1 1 100.00
rd_buff_eviction_w_ecc 3 3 100.00
flash_ctrl_rw_evict 14.400s 81.355us 1 1 100.00
flash_ctrl_rw_evict_all_en 14.480s 138.214us 1 1 100.00
flash_ctrl_re_evict 19.050s 123.364us 1 1 100.00
host_arb 1 1 100.00
flash_ctrl_phy_arb 85.920s 372.632us 1 1 100.00
host_interleave 1 1 100.00
flash_ctrl_phy_arb 85.920s 372.632us 1 1 100.00
memory_protection 1 1 100.00
flash_ctrl_mp_regions 164.360s 43828.468us 1 1 100.00
fetch_code 1 1 100.00
flash_ctrl_fetch_code 12.300s 90.561us 1 1 100.00
all_partitions 1 1 100.00
flash_ctrl_rand_ops 152.110s 303.024us 1 1 100.00
error_mp 1 1 100.00
flash_ctrl_error_mp 435.820s 3467.956us 1 1 100.00
error_prog_win 1 1 100.00
flash_ctrl_error_prog_win 279.570s 344.260us 1 1 100.00
error_prog_type 1 1 100.00
flash_ctrl_error_prog_type 923.430s 946.904us 1 1 100.00
error_read_seed 1 1 100.00
flash_ctrl_hw_read_seed_err 5.410s 40.741us 1 1 100.00
read_write_overflow 1 1 100.00
flash_ctrl_oversize_error 123.210s 1281.948us 1 1 100.00
flash_ctrl_disable 1 1 100.00
flash_ctrl_disable 9.090s 31.350us 1 1 100.00
flash_ctrl_connect 1 1 100.00
flash_ctrl_connect 6.820s 155.588us 1 1 100.00
stress_all 1 1 100.00
flash_ctrl_stress_all 790.060s 474.407us 1 1 100.00
secret_partition 2 2 100.00
flash_ctrl_hw_sec_otp 175.230s 6572.663us 1 1 100.00
flash_ctrl_otp_reset 61.160s 401.934us 1 1 100.00
isolation_partition 1 1 100.00
flash_ctrl_hw_rma 1224.570s 170016.419us 1 1 100.00
interrupts 4 4 100.00
flash_ctrl_intr_rd 82.300s 543.407us 1 1 100.00
flash_ctrl_intr_wr 56.220s 2801.380us 1 1 100.00
flash_ctrl_intr_rd_slow_flash 104.820s 12074.324us 1 1 100.00
flash_ctrl_intr_wr_slow_flash 135.810s 95115.946us 1 1 100.00
invalid_op 1 1 100.00
flash_ctrl_invalid_op 58.660s 1832.873us 1 1 100.00
mid_op_rst 1 1 100.00
flash_ctrl_mid_op_rst 33.110s 849.607us 1 1 100.00
double_bit_err 5 5 100.00
flash_ctrl_read_word_sweep_derr 9.730s 44.411us 1 1 100.00
flash_ctrl_ro_derr 94.840s 2684.755us 1 1 100.00
flash_ctrl_rw_derr 130.350s 28815.599us 1 1 100.00
flash_ctrl_derr_detect 114.690s 920.967us 1 1 100.00
flash_ctrl_integrity 378.980s 3882.462us 1 1 100.00
single_bit_err 3 3 100.00
flash_ctrl_read_word_sweep_serr 10.140s 34.529us 1 1 100.00
flash_ctrl_ro_serr 78.880s 1507.220us 1 1 100.00
flash_ctrl_rw_serr 139.140s 3676.564us 1 1 100.00
singlebit_err_counter 1 1 100.00
flash_ctrl_serr_counter 55.930s 964.470us 1 1 100.00
singlebit_err_address 1 1 100.00
flash_ctrl_serr_address 43.650s 1419.319us 1 1 100.00
scramble 5 5 100.00
flash_ctrl_wo 93.660s 3465.894us 1 1 100.00
flash_ctrl_write_word_sweep 6.650s 64.225us 1 1 100.00
flash_ctrl_read_word_sweep 9.020s 26.051us 1 1 100.00
flash_ctrl_ro 78.580s 1099.711us 1 1 100.00
flash_ctrl_rw 362.300s 3830.950us 1 1 100.00
filesystem_support 1 1 100.00
flash_ctrl_fs_sup 25.190s 1397.992us 1 1 100.00
rma_write_process_error 2 2 100.00
flash_ctrl_rma_err 596.830s 160813.957us 1 1 100.00
flash_ctrl_hw_prog_rma_wipe_err 69.990s 10020.140us 1 1 100.00
alert_test 1 1 100.00
flash_ctrl_alert_test 5.970s 88.364us 1 1 100.00
intr_test 1 1 100.00
flash_ctrl_intr_test 5.340s 53.355us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
flash_ctrl_tl_errors 9.230s 59.873us 1 1 100.00
tl_d_illegal_access 1 1 100.00
flash_ctrl_tl_errors 9.230s 59.873us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
flash_ctrl_csr_hw_reset 18.290s 26.708us 1 1 100.00
flash_ctrl_csr_rw 8.530s 148.500us 1 1 100.00
flash_ctrl_csr_aliasing 30.330s 859.022us 1 1 100.00
flash_ctrl_same_csr_outstanding 15.870s 247.152us 1 1 100.00
tl_d_partial_access 4 4 100.00
flash_ctrl_csr_hw_reset 18.290s 26.708us 1 1 100.00
flash_ctrl_csr_rw 8.530s 148.500us 1 1 100.00
flash_ctrl_csr_aliasing 30.330s 859.022us 1 1 100.00
flash_ctrl_same_csr_outstanding 15.870s 247.152us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
flash_ctrl_shadow_reg_errors 31.030s 80.526us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
flash_ctrl_shadow_reg_errors 31.030s 80.526us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
flash_ctrl_shadow_reg_errors 31.030s 80.526us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
flash_ctrl_shadow_reg_errors 31.030s 80.526us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
flash_ctrl_shadow_reg_errors_with_csr_rw 21.630s 98.201us 1 1 100.00
tl_intg_err 2 2 100.00
flash_ctrl_tl_intg_err 351.310s 663.139us 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
sec_cm_reg_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 351.310s 663.139us 1 1 100.00
sec_cm_host_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 351.310s 663.139us 1 1 100.00
sec_cm_mem_bus_integrity 2 2 100.00
flash_ctrl_rd_intg 14.200s 216.122us 1 1 100.00
flash_ctrl_wr_intg 6.590s 46.436us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
flash_ctrl_smoke 40.330s 34.173us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 4 4 100.00
flash_ctrl_otp_reset 61.160s 401.934us 1 1 100.00
flash_ctrl_disable 9.090s 31.350us 1 1 100.00
flash_ctrl_sec_info_access 38.560s 1748.525us 1 1 100.00
flash_ctrl_connect 6.820s 155.588us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
flash_ctrl_config_regwen 6.990s 22.342us 1 1 100.00
sec_cm_data_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.530s 148.500us 1 1 100.00
sec_cm_data_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 31.030s 80.526us 1 1 100.00
sec_cm_info_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.530s 148.500us 1 1 100.00
sec_cm_info_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 31.030s 80.526us 1 1 100.00
sec_cm_bank_config_regwen 1 1 100.00
flash_ctrl_csr_rw 8.530s 148.500us 1 1 100.00
sec_cm_bank_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 31.030s 80.526us 1 1 100.00
sec_cm_mem_ctrl_global_esc 1 1 100.00
flash_ctrl_disable 9.090s 31.350us 1 1 100.00
sec_cm_mem_ctrl_local_esc 2 2 100.00
flash_ctrl_rd_intg 14.200s 216.122us 1 1 100.00
flash_ctrl_access_after_disable 7.290s 30.315us 1 1 100.00
sec_cm_mem_addr_infection 1 1 100.00
flash_ctrl_host_addr_infection 13.760s 64.191us 1 1 100.00
sec_cm_mem_disable_config_mubi 1 1 100.00
flash_ctrl_disable 9.090s 31.350us 1 1 100.00
sec_cm_exec_config_redun 1 1 100.00
flash_ctrl_fetch_code 12.300s 90.561us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
flash_ctrl_rw 362.300s 3830.950us 1 1 100.00
sec_cm_mem_integrity 3 3 100.00
flash_ctrl_rw_serr 139.140s 3676.564us 1 1 100.00
flash_ctrl_rw_derr 130.350s 28815.599us 1 1 100.00
flash_ctrl_integrity 378.980s 3882.462us 1 1 100.00
sec_cm_rma_entry_mem_sec_wipe 1 1 100.00
flash_ctrl_hw_rma 1224.570s 170016.419us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
sec_cm_phy_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
sec_cm_phy_prog_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
sec_cm_phy_arbiter_ctrl_redun 1 1 100.00
flash_ctrl_phy_arb_redun 9.980s 849.887us 1 1 100.00
sec_cm_phy_host_grant_ctrl_consistency 0 1 0.00
flash_ctrl_phy_host_grant_err 5.620s 12.336us 0 1 0.00
sec_cm_phy_ack_ctrl_consistency 0 1 0.00
flash_ctrl_phy_ack_consistency 5.890s 4.727us 0 1 0.00
sec_cm_fifo_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
sec_cm_mem_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
sec_cm_prog_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1509.170s 1691.996us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
asymmetric_read_path 1 1 100.00
flash_ctrl_rd_ooo 20.500s 88.113us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
flash_ctrl_basic_rw 353.920s 1579.647us 1 1 100.00