Simulation Results: keymgr

 
20/11/2025 19:30:26 sha: 1f7db17 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 89.94
  • line
  • 98.66
  • cond
  • 95.11
  • toggle
  • 95.5
  • fsm
  • 86.05
  • branch
  • 97.58
  • assert
  • 97.72
  • group
  • 58.96
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 7.880s 629.888us 1 1 100.00
random 1 1 100.00
keymgr_random 38.320s 3124.231us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.250s 68.049us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.890s 12.323us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 8.390s 934.299us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 5.220s 378.117us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 2.150s 28.644us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.890s 12.323us 1 1 100.00
keymgr_csr_aliasing 5.220s 378.117us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 9.370s 255.161us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 4.220s 1532.363us 1 1 100.00
keymgr_sideload_kmac 4.280s 196.866us 1 1 100.00
keymgr_sideload_aes 4.920s 2246.229us 1 1 100.00
keymgr_sideload_otbn 5.710s 470.941us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.900s 63.143us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.530s 86.909us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.010s 35.300us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.580s 51.166us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.050s 347.656us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.000s 44.534us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 14.550s 803.374us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 1.050s 23.803us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.850s 17.530us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 4.280s 132.030us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 4.280s 132.030us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.250s 68.049us 1 1 100.00
keymgr_csr_rw 0.890s 12.323us 1 1 100.00
keymgr_csr_aliasing 5.220s 378.117us 1 1 100.00
keymgr_same_csr_outstanding 3.020s 562.591us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.250s 68.049us 1 1 100.00
keymgr_csr_rw 0.890s 12.323us 1 1 100.00
keymgr_csr_aliasing 5.220s 378.117us 1 1 100.00
keymgr_same_csr_outstanding 3.020s 562.591us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 5.640s 956.056us 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.900s 642.625us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.900s 642.625us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.900s 642.625us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.900s 642.625us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 7.100s 1220.012us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 5.640s 956.056us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.900s 642.625us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 9.370s 255.161us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 0.890s 12.323us 1 1 100.00
keymgr_random 38.320s 3124.231us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 0.890s 12.323us 1 1 100.00
keymgr_random 38.320s 3124.231us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 0.890s 12.323us 1 1 100.00
keymgr_random 38.320s 3124.231us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.530s 86.909us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.050s 347.656us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.050s 347.656us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 38.320s 3124.231us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.230s 124.954us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 1.340s 40.624us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.530s 86.909us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.340s 40.624us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.340s 40.624us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.340s 40.624us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.090s 1088.704us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 1.340s 40.624us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 7.280s 823.189us 1 1 100.00