Simulation Results: lc_ctrl

 
20/11/2025 19:30:26 sha: 1f7db17 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 86.29
  • line
  • 97.06
  • cond
  • 79.7
  • toggle
  • 80.5
  • fsm
  • 71.58
  • branch
  • 93.77
  • assert
  • 93.85
  • group
  • 87.54
Validation stages
V1
100.00%
V2
87.50%
V2S
67.86%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
lc_ctrl_smoke 1.450s 287.573us 2 2 100.00
csr_hw_reset 2 2 100.00
lc_ctrl_csr_hw_reset 0.870s 187.651us 2 2 100.00
csr_rw 2 2 100.00
lc_ctrl_csr_rw 0.800s 19.049us 2 2 100.00
csr_bit_bash 2 2 100.00
lc_ctrl_csr_bit_bash 1.140s 28.539us 2 2 100.00
csr_aliasing 2 2 100.00
lc_ctrl_csr_aliasing 1.320s 38.098us 2 2 100.00
csr_mem_rw_with_rand_reset 2 2 100.00
lc_ctrl_csr_mem_rw_with_rand_reset 1.030s 112.151us 2 2 100.00
regwen_csr_and_corresponding_lockable_csr 4 4 100.00
lc_ctrl_csr_rw 0.800s 19.049us 2 2 100.00
lc_ctrl_csr_aliasing 1.320s 38.098us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
state_post_trans 2 2 100.00
lc_ctrl_state_post_trans 6.050s 602.701us 2 2 100.00
regwen_during_op 2 2 100.00
lc_ctrl_regwen_during_op 13.980s 1550.494us 2 2 100.00
rand_wr_claim_transition_if 2 2 100.00
lc_ctrl_claim_transition_if 0.760s 12.734us 2 2 100.00
lc_prog_failure 2 2 100.00
lc_ctrl_prog_failure 2.630s 450.439us 2 2 100.00
lc_state_failure 0 2 0.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_errors 2 2 100.00
lc_ctrl_errors 5.660s 2702.654us 2 2 100.00
security_escalation 10 14 71.43
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_prog_failure 2.630s 450.439us 2 2 100.00
lc_ctrl_errors 5.660s 2702.654us 2 2 100.00
lc_ctrl_security_escalation 6.410s 1270.477us 2 2 100.00
lc_ctrl_jtag_state_failure 7.080s 504.641us 0 2 0.00
lc_ctrl_jtag_prog_failure 6.680s 1775.533us 2 2 100.00
lc_ctrl_jtag_errors 45.760s 10598.653us 2 2 100.00
jtag_access 24 26 92.31
lc_ctrl_jtag_csr_hw_reset 1.530s 568.964us 2 2 100.00
lc_ctrl_jtag_csr_rw 1.820s 311.089us 2 2 100.00
lc_ctrl_jtag_csr_bit_bash 18.010s 1279.503us 2 2 100.00
lc_ctrl_jtag_csr_aliasing 4.200s 2666.830us 2 2 100.00
lc_ctrl_jtag_same_csr_outstanding 1.400s 41.715us 2 2 100.00
lc_ctrl_jtag_csr_mem_rw_with_rand_reset 2.080s 3393.303us 2 2 100.00
lc_ctrl_jtag_alert_test 2.230s 113.147us 2 2 100.00
lc_ctrl_jtag_smoke 3.210s 161.009us 2 2 100.00
lc_ctrl_jtag_state_post_trans 7.280s 474.298us 0 2 0.00
lc_ctrl_jtag_prog_failure 6.680s 1775.533us 2 2 100.00
lc_ctrl_jtag_errors 45.760s 10598.653us 2 2 100.00
lc_ctrl_jtag_access 2.480s 2115.662us 2 2 100.00
lc_ctrl_jtag_regwen_during_op 13.920s 747.185us 2 2 100.00
jtag_priority 2 2 100.00
lc_ctrl_jtag_priority 6.430s 1427.264us 2 2 100.00
lc_ctrl_volatile_unlock 2 2 100.00
lc_ctrl_volatile_unlock_smoke 0.910s 13.610us 2 2 100.00
stress_all 0 2 0.00
lc_ctrl_stress_all 11.900s 1141.200us 0 2 0.00
alert_test 2 2 100.00
lc_ctrl_alert_test 0.730s 232.714us 2 2 100.00
tl_d_oob_addr_access 2 2 100.00
lc_ctrl_tl_errors 2.020s 42.766us 2 2 100.00
tl_d_illegal_access 2 2 100.00
lc_ctrl_tl_errors 2.020s 42.766us 2 2 100.00
tl_d_outstanding_access 8 8 100.00
lc_ctrl_csr_hw_reset 0.870s 187.651us 2 2 100.00
lc_ctrl_csr_rw 0.800s 19.049us 2 2 100.00
lc_ctrl_csr_aliasing 1.320s 38.098us 2 2 100.00
lc_ctrl_same_csr_outstanding 1.100s 168.806us 2 2 100.00
tl_d_partial_access 8 8 100.00
lc_ctrl_csr_hw_reset 0.870s 187.651us 2 2 100.00
lc_ctrl_csr_rw 0.800s 19.049us 2 2 100.00
lc_ctrl_csr_aliasing 1.320s 38.098us 2 2 100.00
lc_ctrl_same_csr_outstanding 1.100s 168.806us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 4 4 100.00
lc_ctrl_tl_intg_err 2.380s 730.538us 2 2 100.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_bus_integrity 2 2 100.00
lc_ctrl_tl_intg_err 2.380s 730.538us 2 2 100.00
sec_cm_transition_config_regwen 2 2 100.00
lc_ctrl_regwen_during_op 13.980s 1550.494us 2 2 100.00
sec_cm_manuf_state_sparse 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_transition_ctr_sparse 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_manuf_state_bkgn_chk 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_transition_ctr_bkgn_chk 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_state_config_sparse 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_main_fsm_sparse 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_kmac_fsm_sparse 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_main_fsm_local_esc 2 4 50.00
lc_ctrl_state_failure 5.040s 142.824us 0 2 0.00
lc_ctrl_sec_cm 5.920s 981.323us 2 2 100.00
sec_cm_main_fsm_global_esc 2 2 100.00
lc_ctrl_security_escalation 6.410s 1270.477us 2 2 100.00
sec_cm_main_ctrl_flow_consistency 2 4 50.00
lc_ctrl_state_post_trans 6.050s 602.701us 2 2 100.00
lc_ctrl_jtag_state_post_trans 7.280s 474.298us 0 2 0.00
sec_cm_intersig_mubi 2 2 100.00
lc_ctrl_sec_mubi 6.940s 414.433us 2 2 100.00
sec_cm_token_valid_ctrl_mubi 2 2 100.00
lc_ctrl_sec_mubi 6.940s 414.433us 2 2 100.00
sec_cm_token_digest 2 2 100.00
lc_ctrl_sec_token_digest 6.170s 4117.226us 2 2 100.00
sec_cm_token_mux_ctrl_redun 2 2 100.00
lc_ctrl_sec_token_mux 7.750s 4316.057us 2 2 100.00
sec_cm_token_valid_mux_redun 2 2 100.00
lc_ctrl_sec_token_mux 7.750s 4316.057us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 2 0.00
lc_ctrl_stress_all_with_rand_reset 32.980s 3330.777us 0 2 0.00