Simulation Results: flash_ctrl

 
24/11/2025 21:26:03 sha: 7f0e31e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 94.7
  • line
  • 95.99
  • cond
  • 93.67
  • toggle
  • 98.41
  • fsm
  • 85.71
  • branch
  • 97.23
  • assert
  • 96.17
  • group
  • 95.73
Validation stages
V1
100.00%
V2
98.46%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
flash_ctrl_smoke 39.970s 62.940us 1 1 100.00
smoke_hw 1 1 100.00
flash_ctrl_smoke_hw 10.970s 43.783us 1 1 100.00
csr_hw_reset 1 1 100.00
flash_ctrl_csr_hw_reset 16.410s 36.465us 1 1 100.00
csr_rw 1 1 100.00
flash_ctrl_csr_rw 7.630s 487.976us 1 1 100.00
csr_bit_bash 1 1 100.00
flash_ctrl_csr_bit_bash 39.350s 1274.870us 1 1 100.00
csr_aliasing 1 1 100.00
flash_ctrl_csr_aliasing 19.190s 663.807us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
flash_ctrl_csr_mem_rw_with_rand_reset 15.050s 39.794us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
flash_ctrl_csr_rw 7.630s 487.976us 1 1 100.00
flash_ctrl_csr_aliasing 19.190s 663.807us 1 1 100.00
mem_walk 1 1 100.00
flash_ctrl_mem_walk 5.340s 58.181us 1 1 100.00
mem_partial_access 1 1 100.00
flash_ctrl_mem_partial_access 5.490s 21.334us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sw_op 1 1 100.00
flash_ctrl_sw_op 12.360s 32.321us 1 1 100.00
host_read_direct 1 1 100.00
flash_ctrl_host_dir_rd 37.370s 60.257us 1 1 100.00
rma_hw_if 3 3 100.00
flash_ctrl_hw_rma 1268.100s 104840.296us 1 1 100.00
flash_ctrl_hw_rma_reset 554.350s 40126.019us 1 1 100.00
flash_ctrl_lcmgr_intg 6.720s 23.151us 1 1 100.00
host_controller_arb 1 1 100.00
flash_ctrl_host_ctrl_arb 1515.450s 365047.374us 1 1 100.00
erase_suspend 1 1 100.00
flash_ctrl_erase_suspend 218.060s 5718.122us 1 1 100.00
program_reset 1 1 100.00
flash_ctrl_prog_reset 8.110s 38.783us 1 1 100.00
full_memory_access 1 1 100.00
flash_ctrl_full_mem_access 2171.000s 339647.311us 1 1 100.00
rd_buff_eviction 1 1 100.00
flash_ctrl_rd_buff_evict 71.780s 2934.716us 1 1 100.00
rd_buff_eviction_w_ecc 3 3 100.00
flash_ctrl_rw_evict 14.240s 64.950us 1 1 100.00
flash_ctrl_rw_evict_all_en 18.610s 29.218us 1 1 100.00
flash_ctrl_re_evict 19.790s 109.094us 1 1 100.00
host_arb 1 1 100.00
flash_ctrl_phy_arb 32.880s 60.601us 1 1 100.00
host_interleave 1 1 100.00
flash_ctrl_phy_arb 32.880s 60.601us 1 1 100.00
memory_protection 1 1 100.00
flash_ctrl_mp_regions 90.210s 7785.233us 1 1 100.00
fetch_code 1 1 100.00
flash_ctrl_fetch_code 11.460s 383.724us 1 1 100.00
all_partitions 1 1 100.00
flash_ctrl_rand_ops 247.710s 287.139us 1 1 100.00
error_mp 1 1 100.00
flash_ctrl_error_mp 282.850s 2153.450us 1 1 100.00
error_prog_win 1 1 100.00
flash_ctrl_error_prog_win 291.240s 1796.452us 1 1 100.00
error_prog_type 1 1 100.00
flash_ctrl_error_prog_type 767.890s 1811.472us 1 1 100.00
error_read_seed 1 1 100.00
flash_ctrl_hw_read_seed_err 5.550s 74.633us 1 1 100.00
read_write_overflow 1 1 100.00
flash_ctrl_oversize_error 118.440s 2136.260us 1 1 100.00
flash_ctrl_disable 1 1 100.00
flash_ctrl_disable 10.160s 105.052us 1 1 100.00
flash_ctrl_connect 1 1 100.00
flash_ctrl_connect 7.450s 49.241us 1 1 100.00
stress_all 1 1 100.00
flash_ctrl_stress_all 629.480s 413.992us 1 1 100.00
secret_partition 2 2 100.00
flash_ctrl_hw_sec_otp 85.490s 18982.981us 1 1 100.00
flash_ctrl_otp_reset 43.270s 607.828us 1 1 100.00
isolation_partition 1 1 100.00
flash_ctrl_hw_rma 1268.100s 104840.296us 1 1 100.00
interrupts 4 4 100.00
flash_ctrl_intr_rd 122.830s 4261.927us 1 1 100.00
flash_ctrl_intr_wr 58.000s 2468.956us 1 1 100.00
flash_ctrl_intr_rd_slow_flash 101.530s 6053.132us 1 1 100.00
flash_ctrl_intr_wr_slow_flash 192.160s 96917.325us 1 1 100.00
invalid_op 1 1 100.00
flash_ctrl_invalid_op 42.870s 3071.291us 1 1 100.00
mid_op_rst 1 1 100.00
flash_ctrl_mid_op_rst 39.150s 6323.359us 1 1 100.00
double_bit_err 5 5 100.00
flash_ctrl_read_word_sweep_derr 10.710s 26.429us 1 1 100.00
flash_ctrl_ro_derr 87.890s 2933.722us 1 1 100.00
flash_ctrl_rw_derr 143.180s 5467.904us 1 1 100.00
flash_ctrl_derr_detect 98.900s 1250.399us 1 1 100.00
flash_ctrl_integrity 389.690s 14859.651us 1 1 100.00
single_bit_err 3 3 100.00
flash_ctrl_read_word_sweep_serr 9.800s 26.390us 1 1 100.00
flash_ctrl_ro_serr 93.300s 669.762us 1 1 100.00
flash_ctrl_rw_serr 137.170s 2189.495us 1 1 100.00
singlebit_err_counter 1 1 100.00
flash_ctrl_serr_counter 34.610s 834.740us 1 1 100.00
singlebit_err_address 1 1 100.00
flash_ctrl_serr_address 38.910s 1703.608us 1 1 100.00
scramble 4 5 80.00
flash_ctrl_wo 86.490s 1823.227us 1 1 100.00
flash_ctrl_write_word_sweep 7.230s 147.719us 1 1 100.00
flash_ctrl_read_word_sweep 6.130s 46.494us 1 1 100.00
flash_ctrl_ro 23.130s 96.032us 0 1 0.00
flash_ctrl_rw 386.280s 30697.289us 1 1 100.00
filesystem_support 1 1 100.00
flash_ctrl_fs_sup 25.950s 315.890us 1 1 100.00
rma_write_process_error 2 2 100.00
flash_ctrl_rma_err 641.170s 41778.500us 1 1 100.00
flash_ctrl_hw_prog_rma_wipe_err 44.460s 10038.287us 1 1 100.00
alert_test 1 1 100.00
flash_ctrl_alert_test 5.800s 74.573us 1 1 100.00
intr_test 1 1 100.00
flash_ctrl_intr_test 5.990s 33.152us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
flash_ctrl_tl_errors 6.930s 58.616us 1 1 100.00
tl_d_illegal_access 1 1 100.00
flash_ctrl_tl_errors 6.930s 58.616us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
flash_ctrl_csr_hw_reset 16.410s 36.465us 1 1 100.00
flash_ctrl_csr_rw 7.630s 487.976us 1 1 100.00
flash_ctrl_csr_aliasing 19.190s 663.807us 1 1 100.00
flash_ctrl_same_csr_outstanding 10.760s 38.634us 1 1 100.00
tl_d_partial_access 4 4 100.00
flash_ctrl_csr_hw_reset 16.410s 36.465us 1 1 100.00
flash_ctrl_csr_rw 7.630s 487.976us 1 1 100.00
flash_ctrl_csr_aliasing 19.190s 663.807us 1 1 100.00
flash_ctrl_same_csr_outstanding 10.760s 38.634us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
flash_ctrl_shadow_reg_errors 24.980s 34.477us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
flash_ctrl_shadow_reg_errors 24.980s 34.477us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
flash_ctrl_shadow_reg_errors 24.980s 34.477us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
flash_ctrl_shadow_reg_errors 24.980s 34.477us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
flash_ctrl_shadow_reg_errors_with_csr_rw 31.020s 583.997us 1 1 100.00
tl_intg_err 2 2 100.00
flash_ctrl_tl_intg_err 350.130s 556.162us 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
sec_cm_reg_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 350.130s 556.162us 1 1 100.00
sec_cm_host_bus_integrity 1 1 100.00
flash_ctrl_tl_intg_err 350.130s 556.162us 1 1 100.00
sec_cm_mem_bus_integrity 2 2 100.00
flash_ctrl_rd_intg 18.200s 127.105us 1 1 100.00
flash_ctrl_wr_intg 8.690s 48.050us 1 1 100.00
sec_cm_scramble_key_sideload 1 1 100.00
flash_ctrl_smoke 39.970s 62.940us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 4 4 100.00
flash_ctrl_otp_reset 43.270s 607.828us 1 1 100.00
flash_ctrl_disable 10.160s 105.052us 1 1 100.00
flash_ctrl_sec_info_access 29.080s 381.960us 1 1 100.00
flash_ctrl_connect 7.450s 49.241us 1 1 100.00
sec_cm_ctrl_config_regwen 1 1 100.00
flash_ctrl_config_regwen 6.390s 39.114us 1 1 100.00
sec_cm_data_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 7.630s 487.976us 1 1 100.00
sec_cm_data_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 24.980s 34.477us 1 1 100.00
sec_cm_info_regions_config_regwen 1 1 100.00
flash_ctrl_csr_rw 7.630s 487.976us 1 1 100.00
sec_cm_info_regions_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 24.980s 34.477us 1 1 100.00
sec_cm_bank_config_regwen 1 1 100.00
flash_ctrl_csr_rw 7.630s 487.976us 1 1 100.00
sec_cm_bank_config_shadow 1 1 100.00
flash_ctrl_shadow_reg_errors 24.980s 34.477us 1 1 100.00
sec_cm_mem_ctrl_global_esc 1 1 100.00
flash_ctrl_disable 10.160s 105.052us 1 1 100.00
sec_cm_mem_ctrl_local_esc 2 2 100.00
flash_ctrl_rd_intg 18.200s 127.105us 1 1 100.00
flash_ctrl_access_after_disable 5.960s 22.778us 1 1 100.00
sec_cm_mem_addr_infection 1 1 100.00
flash_ctrl_host_addr_infection 13.040s 27.586us 1 1 100.00
sec_cm_mem_disable_config_mubi 1 1 100.00
flash_ctrl_disable 10.160s 105.052us 1 1 100.00
sec_cm_exec_config_redun 1 1 100.00
flash_ctrl_fetch_code 11.460s 383.724us 1 1 100.00
sec_cm_mem_scramble 1 1 100.00
flash_ctrl_rw 386.280s 30697.289us 1 1 100.00
sec_cm_mem_integrity 3 3 100.00
flash_ctrl_rw_serr 137.170s 2189.495us 1 1 100.00
flash_ctrl_rw_derr 143.180s 5467.904us 1 1 100.00
flash_ctrl_integrity 389.690s 14859.651us 1 1 100.00
sec_cm_rma_entry_mem_sec_wipe 1 1 100.00
flash_ctrl_hw_rma 1268.100s 104840.296us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
sec_cm_phy_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
sec_cm_phy_prog_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
sec_cm_phy_arbiter_ctrl_redun 1 1 100.00
flash_ctrl_phy_arb_redun 10.030s 782.285us 1 1 100.00
sec_cm_phy_host_grant_ctrl_consistency 1 1 100.00
flash_ctrl_phy_host_grant_err 9.680s 59.327us 1 1 100.00
sec_cm_phy_ack_ctrl_consistency 1 1 100.00
flash_ctrl_phy_ack_consistency 5.800s 83.625us 1 1 100.00
sec_cm_fifo_ctr_redun 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
sec_cm_mem_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
sec_cm_prog_tl_lc_gate_fsm_sparse 1 1 100.00
flash_ctrl_sec_cm 1565.420s 1007.239us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
asymmetric_read_path 1 1 100.00
flash_ctrl_rd_ooo 20.540s 308.079us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
flash_ctrl_basic_rw 210.150s 2153.415us 1 1 100.00