| host_error_intr |
0 |
1 |
0.00 |
|
i2c_host_error_intr |
0.730s |
4.182us |
0 |
1 |
0.00
|
| host_stress_all |
0 |
1 |
0.00 |
|
i2c_host_stress_all |
1921.650s |
600000.000us |
0 |
1 |
0.00
|
| host_maxperf |
1 |
1 |
100.00 |
|
i2c_host_perf |
121.080s |
51442.788us |
1 |
1 |
100.00
|
| host_override |
1 |
1 |
100.00 |
|
i2c_host_override |
0.660s |
26.487us |
1 |
1 |
100.00
|
| host_fifo_watermark |
1 |
1 |
100.00 |
|
i2c_host_fifo_watermark |
141.210s |
14285.999us |
1 |
1 |
100.00
|
| host_fifo_overflow |
1 |
1 |
100.00 |
|
i2c_host_fifo_overflow |
34.030s |
4247.959us |
1 |
1 |
100.00
|
| host_fifo_reset |
3 |
3 |
100.00 |
|
i2c_host_fifo_reset_fmt |
0.900s |
1334.523us |
1 |
1 |
100.00
|
|
i2c_host_fifo_fmt_empty |
3.840s |
1188.189us |
1 |
1 |
100.00
|
|
i2c_host_fifo_reset_rx |
2.610s |
554.495us |
1 |
1 |
100.00
|
| host_fifo_full |
1 |
1 |
100.00 |
|
i2c_host_fifo_full |
32.390s |
9737.329us |
1 |
1 |
100.00
|
| host_timeout |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
15.880s |
540.253us |
1 |
1 |
100.00
|
| i2c_host_mode_toggle |
0 |
1 |
0.00 |
|
i2c_host_mode_toggle |
0.790s |
105.129us |
0 |
1 |
0.00
|
| target_glitch |
0 |
1 |
0.00 |
|
i2c_target_glitch |
1.810s |
6480.607us |
0 |
1 |
0.00
|
| target_stress_all |
1 |
1 |
100.00 |
|
i2c_target_stress_all |
57.510s |
32093.372us |
1 |
1 |
100.00
|
| target_maxperf |
1 |
1 |
100.00 |
|
i2c_target_perf |
2.360s |
508.777us |
1 |
1 |
100.00
|
| target_fifo_empty |
2 |
2 |
100.00 |
|
i2c_target_stress_rd |
46.670s |
1718.601us |
1 |
1 |
100.00
|
|
i2c_target_intr_smoke |
4.140s |
1105.233us |
1 |
1 |
100.00
|
| target_fifo_reset |
2 |
2 |
100.00 |
|
i2c_target_fifo_reset_acq |
1.080s |
248.541us |
1 |
1 |
100.00
|
|
i2c_target_fifo_reset_tx |
1.200s |
861.765us |
1 |
1 |
100.00
|
| target_fifo_full |
3 |
3 |
100.00 |
|
i2c_target_stress_wr |
15.150s |
27975.849us |
1 |
1 |
100.00
|
|
i2c_target_stress_rd |
46.670s |
1718.601us |
1 |
1 |
100.00
|
|
i2c_target_intr_stress_wr |
127.750s |
14239.191us |
1 |
1 |
100.00
|
| target_timeout |
1 |
1 |
100.00 |
|
i2c_target_timeout |
4.490s |
1428.368us |
1 |
1 |
100.00
|
| target_clock_stretch |
1 |
1 |
100.00 |
|
i2c_target_stretch |
0.930s |
412.894us |
1 |
1 |
100.00
|
| bad_address |
1 |
1 |
100.00 |
|
i2c_target_bad_addr |
2.910s |
11190.469us |
1 |
1 |
100.00
|
| target_mode_glitch |
1 |
1 |
100.00 |
|
i2c_target_hrst |
1.190s |
348.633us |
1 |
1 |
100.00
|
| target_fifo_watermark |
2 |
2 |
100.00 |
|
i2c_target_fifo_watermarks_acq |
1.100s |
2241.225us |
1 |
1 |
100.00
|
|
i2c_target_fifo_watermarks_tx |
1.050s |
177.595us |
1 |
1 |
100.00
|
| host_mode_config_perf |
2 |
2 |
100.00 |
|
i2c_host_perf |
121.080s |
51442.788us |
1 |
1 |
100.00
|
|
i2c_host_perf_precise |
10.140s |
710.331us |
1 |
1 |
100.00
|
| host_mode_clock_stretching |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
15.880s |
540.253us |
1 |
1 |
100.00
|
| target_mode_tx_stretch_ctrl |
1 |
1 |
100.00 |
|
i2c_target_tx_stretch_ctrl |
3.560s |
419.408us |
1 |
1 |
100.00
|
| target_mode_nack_generation |
3 |
3 |
100.00 |
|
i2c_target_nack_acqfull |
1.900s |
1765.956us |
1 |
1 |
100.00
|
|
i2c_target_nack_acqfull_addr |
1.970s |
610.066us |
1 |
1 |
100.00
|
|
i2c_target_nack_txstretch |
0.970s |
595.912us |
1 |
1 |
100.00
|
| host_mode_halt_on_nak |
1 |
1 |
100.00 |
|
i2c_host_may_nack |
10.630s |
2581.358us |
1 |
1 |
100.00
|
| target_mode_smbus_maxlen |
1 |
1 |
100.00 |
|
i2c_target_smbus_maxlen |
1.480s |
1918.784us |
1 |
1 |
100.00
|
| alert_test |
1 |
1 |
100.00 |
|
i2c_alert_test |
0.620s |
30.241us |
1 |
1 |
100.00
|
| intr_test |
1 |
1 |
100.00 |
|
i2c_intr_test |
0.840s |
52.113us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.390s |
35.169us |
1 |
1 |
100.00
|
| tl_d_illegal_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.390s |
35.169us |
1 |
1 |
100.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
i2c_csr_hw_reset |
0.730s |
20.506us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.680s |
22.212us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.030s |
28.274us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
0.960s |
49.262us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
i2c_csr_hw_reset |
0.730s |
20.506us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.680s |
22.212us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.030s |
28.274us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
0.960s |
49.262us |
1 |
1 |
100.00
|