Simulation Results: keymgr

 
24/11/2025 21:26:03 sha: 7f0e31e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 91.11
  • line
  • 98.74
  • cond
  • 93.21
  • toggle
  • 97.68
  • fsm
  • 88.37
  • branch
  • 97.67
  • assert
  • 97.49
  • group
  • 64.59
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 3.680s 715.752us 1 1 100.00
random 1 1 100.00
keymgr_random 14.620s 1815.822us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.100s 29.337us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.200s 13.699us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 22.410s 2628.695us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 4.660s 492.100us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.270s 115.918us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.200s 13.699us 1 1 100.00
keymgr_csr_aliasing 4.660s 492.100us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 2.150s 41.244us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 3.240s 704.827us 1 1 100.00
keymgr_sideload_kmac 1.840s 114.493us 1 1 100.00
keymgr_sideload_aes 4.270s 272.207us 1 1 100.00
keymgr_sideload_otbn 2.410s 68.552us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 1.800s 142.609us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 1.970s 205.499us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.910s 322.011us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 3.170s 264.897us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 1.880s 39.633us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.160s 271.668us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 51.160s 3257.082us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.920s 38.066us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.740s 143.704us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.150s 146.398us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.150s 146.398us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.100s 29.337us 1 1 100.00
keymgr_csr_rw 1.200s 13.699us 1 1 100.00
keymgr_csr_aliasing 4.660s 492.100us 1 1 100.00
keymgr_same_csr_outstanding 2.660s 90.813us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.100s 29.337us 1 1 100.00
keymgr_csr_rw 1.200s 13.699us 1 1 100.00
keymgr_csr_aliasing 4.660s 492.100us 1 1 100.00
keymgr_same_csr_outstanding 2.660s 90.813us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
keymgr_tl_intg_err 4.230s 502.519us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.660s 92.870us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.660s 92.870us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.660s 92.870us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.660s 92.870us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 3.730s 94.997us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 4.230s 502.519us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.660s 92.870us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 2.150s 41.244us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 14.620s 1815.822us 1 1 100.00
keymgr_csr_rw 1.200s 13.699us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 14.620s 1815.822us 1 1 100.00
keymgr_csr_rw 1.200s 13.699us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 14.620s 1815.822us 1 1 100.00
keymgr_csr_rw 1.200s 13.699us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 1.970s 205.499us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 1.880s 39.633us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 1.880s 39.633us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 14.620s 1815.822us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.080s 93.989us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 1.840s 153.193us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 1.970s 205.499us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.840s 153.193us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.840s 153.193us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.840s 153.193us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 4.500s 805.078us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 1.840s 153.193us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 3.920s 239.830us 1 1 100.00