Simulation Results: lc_ctrl

 
24/11/2025 21:26:03 sha: 7f0e31e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 85.48
  • line
  • 96.93
  • cond
  • 79.14
  • toggle
  • 81.02
  • fsm
  • 67.37
  • branch
  • 93.47
  • assert
  • 94.13
  • group
  • 86.3
Validation stages
V1
100.00%
V2
82.50%
V2S
67.86%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
lc_ctrl_smoke 2.850s 309.649us 1 1 100.00
csr_hw_reset 1 1 100.00
lc_ctrl_csr_hw_reset 1.100s 38.124us 1 1 100.00
csr_rw 1 1 100.00
lc_ctrl_csr_rw 1.080s 51.762us 1 1 100.00
csr_bit_bash 1 1 100.00
lc_ctrl_csr_bit_bash 1.530s 206.406us 1 1 100.00
csr_aliasing 1 1 100.00
lc_ctrl_csr_aliasing 1.380s 25.713us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
lc_ctrl_csr_mem_rw_with_rand_reset 1.190s 72.404us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
lc_ctrl_csr_rw 1.080s 51.762us 1 1 100.00
lc_ctrl_csr_aliasing 1.380s 25.713us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
state_post_trans 1 1 100.00
lc_ctrl_state_post_trans 3.950s 167.921us 1 1 100.00
regwen_during_op 1 1 100.00
lc_ctrl_regwen_during_op 5.880s 1829.921us 1 1 100.00
rand_wr_claim_transition_if 1 1 100.00
lc_ctrl_claim_transition_if 0.840s 12.664us 1 1 100.00
lc_prog_failure 1 1 100.00
lc_ctrl_prog_failure 3.410s 150.516us 1 1 100.00
lc_state_failure 0 1 0.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_errors 1 1 100.00
lc_ctrl_errors 4.330s 956.209us 1 1 100.00
security_escalation 4 7 57.14
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_prog_failure 3.410s 150.516us 1 1 100.00
lc_ctrl_errors 4.330s 956.209us 1 1 100.00
lc_ctrl_security_escalation 4.840s 200.315us 1 1 100.00
lc_ctrl_jtag_state_failure 6.380s 685.423us 0 1 0.00
lc_ctrl_jtag_prog_failure 8.460s 389.103us 1 1 100.00
lc_ctrl_jtag_errors 16.230s 3879.902us 0 1 0.00
jtag_access 11 13 84.62
lc_ctrl_jtag_smoke 4.230s 1394.987us 1 1 100.00
lc_ctrl_jtag_state_post_trans 9.120s 755.575us 0 1 0.00
lc_ctrl_jtag_prog_failure 8.460s 389.103us 1 1 100.00
lc_ctrl_jtag_errors 16.230s 3879.902us 0 1 0.00
lc_ctrl_jtag_access 3.090s 293.391us 1 1 100.00
lc_ctrl_jtag_regwen_during_op 11.570s 9698.127us 1 1 100.00
lc_ctrl_jtag_csr_hw_reset 3.290s 107.361us 1 1 100.00
lc_ctrl_jtag_csr_rw 1.840s 573.171us 1 1 100.00
lc_ctrl_jtag_csr_bit_bash 11.210s 2674.661us 1 1 100.00
lc_ctrl_jtag_csr_aliasing 4.720s 222.704us 1 1 100.00
lc_ctrl_jtag_same_csr_outstanding 1.520s 28.568us 1 1 100.00
lc_ctrl_jtag_csr_mem_rw_with_rand_reset 2.060s 59.944us 1 1 100.00
lc_ctrl_jtag_alert_test 1.180s 35.491us 1 1 100.00
jtag_priority 1 1 100.00
lc_ctrl_jtag_priority 1.430s 1130.890us 1 1 100.00
lc_ctrl_volatile_unlock 1 1 100.00
lc_ctrl_volatile_unlock_smoke 1.250s 61.481us 1 1 100.00
stress_all 0 1 0.00
lc_ctrl_stress_all 43.690s 2249.704us 0 1 0.00
alert_test 1 1 100.00
lc_ctrl_alert_test 0.950s 21.286us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
lc_ctrl_tl_errors 2.460s 1055.935us 1 1 100.00
tl_d_illegal_access 1 1 100.00
lc_ctrl_tl_errors 2.460s 1055.935us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
lc_ctrl_csr_hw_reset 1.100s 38.124us 1 1 100.00
lc_ctrl_csr_rw 1.080s 51.762us 1 1 100.00
lc_ctrl_csr_aliasing 1.380s 25.713us 1 1 100.00
lc_ctrl_same_csr_outstanding 1.420s 164.777us 1 1 100.00
tl_d_partial_access 4 4 100.00
lc_ctrl_csr_hw_reset 1.100s 38.124us 1 1 100.00
lc_ctrl_csr_rw 1.080s 51.762us 1 1 100.00
lc_ctrl_csr_aliasing 1.380s 25.713us 1 1 100.00
lc_ctrl_same_csr_outstanding 1.420s 164.777us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
lc_ctrl_tl_intg_err 3.450s 1690.312us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
lc_ctrl_tl_intg_err 3.450s 1690.312us 1 1 100.00
sec_cm_transition_config_regwen 1 1 100.00
lc_ctrl_regwen_during_op 5.880s 1829.921us 1 1 100.00
sec_cm_manuf_state_sparse 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_transition_ctr_sparse 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_manuf_state_bkgn_chk 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_transition_ctr_bkgn_chk 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_state_config_sparse 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_main_fsm_sparse 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_kmac_fsm_sparse 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_main_fsm_local_esc 1 2 50.00
lc_ctrl_state_failure 3.760s 22.157us 0 1 0.00
lc_ctrl_sec_cm 6.650s 460.510us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
lc_ctrl_security_escalation 4.840s 200.315us 1 1 100.00
sec_cm_main_ctrl_flow_consistency 1 2 50.00
lc_ctrl_state_post_trans 3.950s 167.921us 1 1 100.00
lc_ctrl_jtag_state_post_trans 9.120s 755.575us 0 1 0.00
sec_cm_intersig_mubi 1 1 100.00
lc_ctrl_sec_mubi 5.240s 1155.663us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
lc_ctrl_sec_mubi 5.240s 1155.663us 1 1 100.00
sec_cm_token_digest 1 1 100.00
lc_ctrl_sec_token_digest 7.850s 599.931us 1 1 100.00
sec_cm_token_mux_ctrl_redun 1 1 100.00
lc_ctrl_sec_token_mux 9.280s 4257.809us 1 1 100.00
sec_cm_token_valid_mux_redun 1 1 100.00
lc_ctrl_sec_token_mux 9.280s 4257.809us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
lc_ctrl_stress_all_with_rand_reset 7.100s 621.148us 0 1 0.00