Simulation Results: rstmgr

 
24/11/2025 21:26:03 sha: 7f0e31e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 98.73
  • line
  • 99.51
  • cond
  • 98.33
  • toggle
  • 99.33
  • fsm
  • None
  • branch
  • 99.83
  • assert
  • 97.86
  • group
  • 97.51
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
rstmgr_smoke 1.540s 259.824us 1 1 100.00
csr_hw_reset 1 1 100.00
rstmgr_csr_hw_reset 1.060s 97.315us 1 1 100.00
csr_rw 1 1 100.00
rstmgr_csr_rw 1.120s 68.314us 1 1 100.00
csr_bit_bash 1 1 100.00
rstmgr_csr_bit_bash 4.070s 1174.045us 1 1 100.00
csr_aliasing 1 1 100.00
rstmgr_csr_aliasing 2.330s 411.500us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
rstmgr_csr_mem_rw_with_rand_reset 1.190s 193.291us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
rstmgr_csr_rw 1.120s 68.314us 1 1 100.00
rstmgr_csr_aliasing 2.330s 411.500us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_stretcher 1 1 100.00
rstmgr_por_stretcher 1.100s 122.816us 1 1 100.00
sw_rst 1 1 100.00
rstmgr_sw_rst 1.700s 135.823us 1 1 100.00
sw_rst_reset_race 1 1 100.00
rstmgr_sw_rst_reset_race 1.220s 199.958us 1 1 100.00
reset_info 1 1 100.00
rstmgr_reset 5.890s 1936.663us 1 1 100.00
cpu_info 1 1 100.00
rstmgr_reset 5.890s 1936.663us 1 1 100.00
alert_info 1 1 100.00
rstmgr_reset 5.890s 1936.663us 1 1 100.00
reset_info_capture 1 1 100.00
rstmgr_reset 5.890s 1936.663us 1 1 100.00
stress_all 1 1 100.00
rstmgr_stress_all 6.610s 1633.386us 1 1 100.00
alert_test 1 1 100.00
rstmgr_alert_test 0.920s 64.192us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
rstmgr_tl_errors 2.400s 188.084us 1 1 100.00
tl_d_illegal_access 1 1 100.00
rstmgr_tl_errors 2.400s 188.084us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
rstmgr_csr_hw_reset 1.060s 97.315us 1 1 100.00
rstmgr_csr_rw 1.120s 68.314us 1 1 100.00
rstmgr_csr_aliasing 2.330s 411.500us 1 1 100.00
rstmgr_same_csr_outstanding 1.450s 214.453us 1 1 100.00
tl_d_partial_access 4 4 100.00
rstmgr_csr_hw_reset 1.060s 97.315us 1 1 100.00
rstmgr_csr_rw 1.120s 68.314us 1 1 100.00
rstmgr_csr_aliasing 2.330s 411.500us 1 1 100.00
rstmgr_same_csr_outstanding 1.450s 214.453us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
rstmgr_sec_cm 22.820s 16810.200us 1 1 100.00
rstmgr_tl_intg_err 2.700s 939.920us 1 1 100.00
prim_count_check 1 1 100.00
rstmgr_sec_cm 22.820s 16810.200us 1 1 100.00
prim_fsm_check 1 1 100.00
rstmgr_sec_cm 22.820s 16810.200us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
rstmgr_tl_intg_err 2.700s 939.920us 1 1 100.00
sec_cm_scan_intersig_mubi 1 1 100.00
rstmgr_sec_cm_scan_intersig_mubi 1.270s 170.489us 1 1 100.00
sec_cm_leaf_rst_bkgn_chk 1 1 100.00
rstmgr_leaf_rst_cnsty 6.430s 2446.584us 1 1 100.00
sec_cm_leaf_rst_shadow 1 1 100.00
rstmgr_leaf_rst_shadow_attack 1.340s 302.619us 1 1 100.00
sec_cm_leaf_fsm_sparse 1 1 100.00
rstmgr_sec_cm 22.820s 16810.200us 1 1 100.00
sec_cm_sw_rst_config_regwen 1 1 100.00
rstmgr_csr_rw 1.120s 68.314us 1 1 100.00
sec_cm_dump_ctrl_config_regwen 1 1 100.00
rstmgr_csr_rw 1.120s 68.314us 1 1 100.00