Simulation Results: spi_host

 
24/11/2025 21:26:03 sha: 7f0e31e json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 95.92
  • block
  • 96.82
  • branch
  • 93.35
  • statement
  • 98.69
  • expression
  • 92.71
  • toggle
  • 88.02
  • fsm
  • 100.0
  • assertion
  • 95.21
  • covergroup
  • 87.92
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_host_smoke 33.000s 2780.309us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_host_csr_hw_reset 1.000s 55.251us 1 1 100.00
csr_rw 1 1 100.00
spi_host_csr_rw 1.000s 20.714us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_host_csr_bit_bash 2.000s 123.433us 1 1 100.00
csr_aliasing 1 1 100.00
spi_host_csr_aliasing 1.000s 24.752us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_host_csr_mem_rw_with_rand_reset 1.000s 84.682us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_host_csr_rw 1.000s 20.714us 1 1 100.00
spi_host_csr_aliasing 1.000s 24.752us 1 1 100.00
mem_walk 1 1 100.00
spi_host_mem_walk 2.000s 16.203us 1 1 100.00
mem_partial_access 1 1 100.00
spi_host_mem_partial_access 2.000s 24.343us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
performance 1 1 100.00
spi_host_performance 2.000s 96.921us 1 1 100.00
error_event_intr 3 3 100.00
spi_host_overflow_underflow 6.000s 1069.678us 1 1 100.00
spi_host_error_cmd 2.000s 26.439us 1 1 100.00
spi_host_event 8.000s 766.246us 1 1 100.00
clock_rate 1 1 100.00
spi_host_speed 8.000s 631.165us 1 1 100.00
speed 1 1 100.00
spi_host_speed 8.000s 631.165us 1 1 100.00
chip_select_timing 1 1 100.00
spi_host_speed 8.000s 631.165us 1 1 100.00
sw_reset 1 1 100.00
spi_host_sw_reset 2.000s 74.746us 1 1 100.00
passthrough_mode 1 1 100.00
spi_host_passthrough_mode 1.000s 73.101us 1 1 100.00
cpol_cpha 1 1 100.00
spi_host_speed 8.000s 631.165us 1 1 100.00
full_cycle 1 1 100.00
spi_host_speed 8.000s 631.165us 1 1 100.00
duplex 1 1 100.00
spi_host_smoke 33.000s 2780.309us 1 1 100.00
tx_rx_only 1 1 100.00
spi_host_smoke 33.000s 2780.309us 1 1 100.00
stress_all 1 1 100.00
spi_host_stress_all 26.000s 3568.453us 1 1 100.00
spien 1 1 100.00
spi_host_spien 2.000s 1107.990us 1 1 100.00
stall 1 1 100.00
spi_host_status_stall 22.000s 2700.253us 1 1 100.00
Idlecsbactive 1 1 100.00
spi_host_idlecsbactive 2.000s 64.451us 1 1 100.00
data_fifo_status 1 1 100.00
spi_host_overflow_underflow 6.000s 1069.678us 1 1 100.00
alert_test 1 1 100.00
spi_host_alert_test 1.000s 16.525us 1 1 100.00
intr_test 1 1 100.00
spi_host_intr_test 1.000s 15.561us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_host_tl_errors 3.000s 48.278us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_host_tl_errors 3.000s 48.278us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_host_csr_hw_reset 1.000s 55.251us 1 1 100.00
spi_host_csr_rw 1.000s 20.714us 1 1 100.00
spi_host_csr_aliasing 1.000s 24.752us 1 1 100.00
spi_host_same_csr_outstanding 1.000s 51.935us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_host_csr_hw_reset 1.000s 55.251us 1 1 100.00
spi_host_csr_rw 1.000s 20.714us 1 1 100.00
spi_host_csr_aliasing 1.000s 24.752us 1 1 100.00
spi_host_same_csr_outstanding 1.000s 51.935us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_host_sec_cm 2.000s 87.457us 1 1 100.00
spi_host_tl_intg_err 2.000s 214.317us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_host_tl_intg_err 2.000s 214.317us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_host_upper_range_clkdiv 306.000s 29262.159us 1 1 100.00