Simulation Results: sysrst_ctrl

 
24/11/2025 21:26:03 sha: 7f0e31e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 88.61
  • line
  • 97.32
  • cond
  • 95.48
  • toggle
  • 100.0
  • fsm
  • 73.72
  • branch
  • 97.4
  • assert
  • 93.87
  • group
  • 62.45
Validation stages
V1
100.00%
V2
95.65%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
sysrst_ctrl_smoke 1.610s 2121.197us 1 1 100.00
input_output_inverted 1 1 100.00
sysrst_ctrl_in_out_inverted 1.480s 2482.475us 1 1 100.00
combo_detect_ec_rst 1 1 100.00
sysrst_ctrl_combo_detect_ec_rst 2.690s 2200.110us 1 1 100.00
combo_detect_ec_rst_with_pre_cond 1 1 100.00
sysrst_ctrl_combo_detect_ec_rst_with_pre_cond 1.660s 2553.910us 1 1 100.00
csr_hw_reset 1 1 100.00
sysrst_ctrl_csr_hw_reset 6.180s 6042.070us 1 1 100.00
csr_rw 1 1 100.00
sysrst_ctrl_csr_rw 1.730s 2119.459us 1 1 100.00
csr_bit_bash 1 1 100.00
sysrst_ctrl_csr_bit_bash 34.040s 38953.177us 1 1 100.00
csr_aliasing 1 1 100.00
sysrst_ctrl_csr_aliasing 3.970s 3270.147us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
sysrst_ctrl_csr_mem_rw_with_rand_reset 1.750s 2112.214us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
sysrst_ctrl_csr_rw 1.730s 2119.459us 1 1 100.00
sysrst_ctrl_csr_aliasing 3.970s 3270.147us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
combo_detect 1 1 100.00
sysrst_ctrl_combo_detect 213.530s 125537.251us 1 1 100.00
combo_detect_with_pre_cond 0 1 0.00
sysrst_ctrl_combo_detect_with_pre_cond 154.790s 78974.460us 0 1 0.00
auto_block_key_outputs 1 1 100.00
sysrst_ctrl_auto_blk_key_output 1.790s 3433.711us 1 1 100.00
keyboard_input_triggered_interrupt 1 1 100.00
sysrst_ctrl_edge_detect 1.970s 3628.149us 1 1 100.00
pin_output_keyboard_inversion_control 1 1 100.00
sysrst_ctrl_pin_override_test 1.590s 2548.889us 1 1 100.00
pin_input_value_accessibility 1 1 100.00
sysrst_ctrl_pin_access_test 1.040s 2246.690us 1 1 100.00
ec_power_on_reset 1 1 100.00
sysrst_ctrl_ec_pwr_on_rst 3.960s 4317.481us 1 1 100.00
flash_write_protect_output 1 1 100.00
sysrst_ctrl_flash_wr_prot_out 4.970s 2608.536us 1 1 100.00
ultra_low_power_test 1 1 100.00
sysrst_ctrl_ultra_low_pwr 1.870s 3819.170us 1 1 100.00
sysrst_ctrl_feature_disable 1 1 100.00
sysrst_ctrl_feature_disable 5.300s 34236.603us 1 1 100.00
stress_all 1 1 100.00
sysrst_ctrl_stress_all 177.940s 100481.081us 1 1 100.00
alert_test 1 1 100.00
sysrst_ctrl_alert_test 1.410s 2042.805us 1 1 100.00
intr_test 1 1 100.00
sysrst_ctrl_intr_test 2.190s 2021.456us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
sysrst_ctrl_tl_errors 2.230s 2247.834us 1 1 100.00
tl_d_illegal_access 1 1 100.00
sysrst_ctrl_tl_errors 2.230s 2247.834us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
sysrst_ctrl_csr_hw_reset 6.180s 6042.070us 1 1 100.00
sysrst_ctrl_csr_rw 1.730s 2119.459us 1 1 100.00
sysrst_ctrl_csr_aliasing 3.970s 3270.147us 1 1 100.00
sysrst_ctrl_same_csr_outstanding 11.660s 5160.552us 1 1 100.00
tl_d_partial_access 4 4 100.00
sysrst_ctrl_csr_hw_reset 6.180s 6042.070us 1 1 100.00
sysrst_ctrl_csr_rw 1.730s 2119.459us 1 1 100.00
sysrst_ctrl_csr_aliasing 3.970s 3270.147us 1 1 100.00
sysrst_ctrl_same_csr_outstanding 11.660s 5160.552us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
sysrst_ctrl_sec_cm 20.810s 22027.055us 1 1 100.00
sysrst_ctrl_tl_intg_err 39.130s 22255.548us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
sysrst_ctrl_tl_intg_err 39.130s 22255.548us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
sysrst_ctrl_stress_all_with_rand_reset 11.140s 5652.553us 1 1 100.00