| chip_pin_mux |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
202.280s |
4968.409us |
1 |
1 |
100.00
|
| chip_padctrl_attributes |
1 |
1 |
100.00 |
|
chip_padctrl_attributes |
202.280s |
4968.409us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_mio_dio_val |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_mio_dio_val |
181.170s |
3083.195us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_wake |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_wake |
197.230s |
4954.547us |
1 |
1 |
100.00
|
| chip_sw_sleep_pin_retention |
1 |
1 |
100.00 |
|
chip_sw_sleep_pin_retention |
148.200s |
3663.334us |
1 |
1 |
100.00
|
| chip_sw_tap_strap_sampling |
4 |
4 |
100.00 |
|
chip_tap_straps_dev |
771.690s |
12082.708us |
1 |
1 |
100.00
|
|
chip_tap_straps_testunlock0 |
96.100s |
2812.225us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
157.590s |
4028.183us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
886.640s |
13226.222us |
1 |
1 |
100.00
|
| chip_sw_pattgen_ios |
1 |
1 |
100.00 |
|
chip_sw_pattgen_ios |
120.690s |
2996.632us |
1 |
1 |
100.00
|
| chip_sw_sleep_pwm_pulses |
1 |
1 |
100.00 |
|
chip_sw_sleep_pwm_pulses |
719.320s |
8746.837us |
1 |
1 |
100.00
|
| chip_sw_data_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
427.480s |
6268.486us |
1 |
1 |
100.00
|
| chip_sw_instruction_integrity |
1 |
1 |
100.00 |
|
chip_sw_data_integrity_escalation |
427.480s |
6268.486us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_outputs |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
569.200s |
7198.547us |
1 |
1 |
100.00
|
| chip_sw_ast_clk_rst_inputs |
0 |
1 |
0.00 |
|
chip_sw_ast_clk_rst_inputs |
1848.390s |
17198.148us |
0 |
1 |
0.00
|
| chip_sw_ast_sys_clk_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
318.830s |
3329.876us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
586.130s |
5549.862us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3419.110s |
18615.603us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
158.210s |
3367.606us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
606.820s |
6884.430us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
142.690s |
2378.067us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
795.310s |
6616.984us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
173.410s |
3290.958us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
357.990s |
4971.258us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
158.750s |
3301.204us |
1 |
1 |
100.00
|
| chip_sw_ast_usb_clk_calib |
1 |
1 |
100.00 |
|
chip_sw_usb_ast_clk_calib |
156.480s |
2921.476us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_alerts |
2 |
2 |
100.00 |
|
chip_sw_sensor_ctrl_alert |
519.930s |
7670.501us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
231.270s |
4523.448us |
1 |
1 |
100.00
|
| chip_sw_sensor_ctrl_ast_status |
1 |
1 |
100.00 |
|
chip_sw_sensor_ctrl_status |
171.930s |
3495.622us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup |
231.270s |
4523.448us |
1 |
1 |
100.00
|
| chip_sw_smoketest |
17 |
17 |
100.00 |
|
chip_sw_flash_scrambling_smoketest |
115.510s |
2841.304us |
1 |
1 |
100.00
|
|
chip_sw_aes_smoketest |
186.160s |
2840.745us |
1 |
1 |
100.00
|
|
chip_sw_aon_timer_smoketest |
170.240s |
2978.715us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_smoketest |
147.090s |
2661.583us |
1 |
1 |
100.00
|
|
chip_sw_csrng_smoketest |
174.940s |
2748.396us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_smoketest |
626.850s |
5409.700us |
1 |
1 |
100.00
|
|
chip_sw_gpio_smoketest |
194.150s |
3585.356us |
1 |
1 |
100.00
|
|
chip_sw_hmac_smoketest |
200.020s |
3644.923us |
1 |
1 |
100.00
|
|
chip_sw_kmac_smoketest |
187.260s |
3014.154us |
1 |
1 |
100.00
|
|
chip_sw_otbn_smoketest |
698.030s |
7100.480us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
273.820s |
6003.627us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_usbdev_smoketest |
277.360s |
5684.213us |
1 |
1 |
100.00
|
|
chip_sw_rv_plic_smoketest |
155.400s |
2765.401us |
1 |
1 |
100.00
|
|
chip_sw_rv_timer_smoketest |
163.160s |
2423.990us |
1 |
1 |
100.00
|
|
chip_sw_rstmgr_smoketest |
160.460s |
2941.424us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_smoketest |
128.490s |
3002.807us |
1 |
1 |
100.00
|
|
chip_sw_uart_smoketest |
138.760s |
2778.527us |
1 |
1 |
100.00
|
| chip_sw_otp_smoketest |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_smoketest |
186.770s |
2854.266us |
1 |
1 |
100.00
|
| chip_sw_rom_functests |
1 |
1 |
100.00 |
|
rom_keymgr_functest |
278.230s |
3892.663us |
1 |
1 |
100.00
|
| chip_sw_boot |
1 |
1 |
100.00 |
|
chip_sw_uart_tx_rx_bootstrap |
8037.230s |
61912.246us |
1 |
1 |
100.00
|
| chip_sw_secure_boot |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2597.050s |
16620.951us |
1 |
1 |
100.00
|
| chip_sw_rom_raw_unlock |
1 |
1 |
100.00 |
|
rom_raw_unlock |
124.850s |
4092.911us |
1 |
1 |
100.00
|
| chip_sw_power_idle_load |
0 |
1 |
0.00 |
|
chip_sw_power_idle_load |
150.320s |
2773.548us |
0 |
1 |
0.00
|
| chip_sw_power_sleep_load |
0 |
1 |
0.00 |
|
chip_sw_power_sleep_load |
223.060s |
3496.938us |
0 |
1 |
0.00
|
| chip_sw_exit_test_unlocked_bootstrap |
1 |
1 |
100.00 |
|
chip_sw_exit_test_unlocked_bootstrap |
6794.150s |
52818.361us |
1 |
1 |
100.00
|
| chip_sw_inject_scramble_seed |
1 |
1 |
100.00 |
|
chip_sw_inject_scramble_seed |
7334.540s |
56484.718us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
51.660s |
2161.689us |
0 |
1 |
0.00
|
| tl_d_illegal_access |
0 |
1 |
0.00 |
|
chip_tl_errors |
51.660s |
2161.689us |
0 |
1 |
0.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3709.520s |
29450.442us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1066.130s |
14333.539us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
167.210s |
4357.288us |
1 |
1 |
100.00
|
|
chip_csr_rw |
215.880s |
4122.763us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
chip_csr_aliasing |
3709.520s |
29450.442us |
1 |
1 |
100.00
|
|
chip_same_csr_outstanding |
1066.130s |
14333.539us |
1 |
1 |
100.00
|
|
chip_csr_hw_reset |
167.210s |
4357.288us |
1 |
1 |
100.00
|
|
chip_csr_rw |
215.880s |
4122.763us |
1 |
1 |
100.00
|
| xbar_base_random_sequence |
1 |
1 |
100.00 |
|
xbar_random |
32.680s |
1582.879us |
1 |
1 |
100.00
|
| xbar_random_delay |
6 |
6 |
100.00 |
|
xbar_smoke_zero_delays |
5.400s |
46.118us |
1 |
1 |
100.00
|
|
xbar_smoke_large_delays |
46.190s |
7636.415us |
1 |
1 |
100.00
|
|
xbar_smoke_slow_rsp |
48.900s |
4775.136us |
1 |
1 |
100.00
|
|
xbar_random_zero_delays |
14.810s |
207.144us |
1 |
1 |
100.00
|
|
xbar_random_large_delays |
114.840s |
18676.658us |
1 |
1 |
100.00
|
|
xbar_random_slow_rsp |
255.910s |
28055.278us |
1 |
1 |
100.00
|
| xbar_unmapped_address |
2 |
2 |
100.00 |
|
xbar_unmapped_addr |
20.920s |
256.477us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
20.890s |
280.582us |
1 |
1 |
100.00
|
| xbar_error_cases |
2 |
2 |
100.00 |
|
xbar_error_random |
49.330s |
2377.880us |
1 |
1 |
100.00
|
|
xbar_error_and_unmapped_addr |
20.890s |
280.582us |
1 |
1 |
100.00
|
| xbar_all_access_same_device |
2 |
2 |
100.00 |
|
xbar_access_same_device |
48.260s |
1983.125us |
1 |
1 |
100.00
|
|
xbar_access_same_device_slow_rsp |
425.320s |
47479.589us |
1 |
1 |
100.00
|
| xbar_all_hosts_use_same_source_id |
1 |
1 |
100.00 |
|
xbar_same_source |
18.350s |
318.878us |
1 |
1 |
100.00
|
| xbar_stress_all |
2 |
2 |
100.00 |
|
xbar_stress_all |
218.140s |
10202.865us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_error |
183.440s |
9213.909us |
1 |
1 |
100.00
|
| xbar_stress_with_reset |
2 |
2 |
100.00 |
|
xbar_stress_all_with_rand_reset |
454.050s |
11271.989us |
1 |
1 |
100.00
|
|
xbar_stress_all_with_reset_error |
223.080s |
7981.628us |
1 |
1 |
100.00
|
| rom_e2e_smoke |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2597.050s |
16620.951us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_output |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_output |
2414.510s |
29172.969us |
1 |
1 |
100.00
|
| rom_e2e_shutdown_exception_c |
1 |
1 |
100.00 |
|
rom_e2e_shutdown_exception_c |
2451.200s |
15601.152us |
1 |
1 |
100.00
|
| rom_e2e_boot_policy_valid |
5 |
15 |
33.33 |
|
rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0 |
2097.570s |
13047.323us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_dev |
2627.710s |
15409.194us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod |
2567.410s |
15845.826us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_prod_end |
2655.280s |
15933.579us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_good_rma |
2483.800s |
16977.230us |
1 |
1 |
100.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0 |
16.680s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_dev |
16.540s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod |
21.870s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_prod_end |
19.760s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_good_b_bad_rma |
24.680s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0 |
17.100s |
10.400us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_dev |
16.520s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod |
21.530s |
10.280us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_prod_end |
24.740s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_boot_policy_valid_a_bad_b_good_rma |
20.770s |
10.400us |
0 |
1 |
0.00
|
| rom_e2e_sigverify_always |
0 |
15 |
0.00 |
|
rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0 |
16.780s |
10.240us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_dev |
16.310s |
10.180us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod |
16.630s |
10.140us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_prod_end |
24.910s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_bad_rma |
17.980s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0 |
16.710s |
10.300us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_dev |
17.370s |
10.160us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod |
18.090s |
10.100us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_prod_end |
20.170s |
10.340us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_bad_b_nothing_rma |
17.240s |
10.320us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0 |
17.170s |
10.260us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_dev |
22.350s |
10.120us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod |
16.890s |
10.360us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_prod_end |
16.790s |
10.380us |
0 |
1 |
0.00
|
|
rom_e2e_sigverify_always_a_nothing_b_bad_rma |
17.390s |
10.100us |
0 |
1 |
0.00
|
| rom_e2e_asm_init |
5 |
5 |
100.00 |
|
rom_e2e_asm_init_test_unlocked0 |
2000.580s |
11817.915us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_dev |
2441.730s |
15240.672us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod |
2406.610s |
15897.349us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_prod_end |
2510.630s |
16564.466us |
1 |
1 |
100.00
|
|
rom_e2e_asm_init_rma |
2348.850s |
15158.365us |
1 |
1 |
100.00
|
| rom_e2e_keymgr_init |
3 |
3 |
100.00 |
|
rom_e2e_keymgr_init_rom_ext_meas |
2415.170s |
15708.892us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_no_meas |
2242.020s |
15046.821us |
1 |
1 |
100.00
|
|
rom_e2e_keymgr_init_rom_ext_invalid_meas |
2338.830s |
16162.156us |
1 |
1 |
100.00
|
| rom_e2e_static_critical |
1 |
1 |
100.00 |
|
rom_e2e_static_critical |
2367.720s |
16023.164us |
1 |
1 |
100.00
|
| chip_sw_adc_ctrl_debug_cable_irq |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2819.780s |
34680.998us |
0 |
1 |
0.00
|
| chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
0 |
1 |
0.00 |
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2819.780s |
34680.998us |
0 |
1 |
0.00
|
| chip_sw_aes_enc |
2 |
2 |
100.00 |
|
chip_sw_aes_enc |
137.170s |
2414.711us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
158.210s |
3367.606us |
1 |
1 |
100.00
|
| chip_sw_aes_entropy |
1 |
1 |
100.00 |
|
chip_sw_aes_entropy |
178.060s |
3320.291us |
1 |
1 |
100.00
|
| chip_sw_aes_idle |
1 |
1 |
100.00 |
|
chip_sw_aes_idle |
164.810s |
3211.618us |
1 |
1 |
100.00
|
| chip_sw_aes_sideload |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1221.740s |
9861.048us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_test |
126.930s |
2598.793us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_escalations |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
302.360s |
4811.025us |
1 |
1 |
100.00
|
| chip_sw_all_escalation_resets |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
366.760s |
4641.643us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
602.430s |
5921.075us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
258.070s |
3190.984us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
338.460s |
4467.684us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_entropy |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_entropy |
144.230s |
3230.187us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_crashdump |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1118.140s |
12520.322us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_timeout |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_timeout |
290.540s |
4657.105us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_sleep_mode_alerts |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_alerts |
139.780s |
3308.034us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_sleep_mode_pings |
0 |
1 |
0.00 |
|
chip_sw_alert_handler_lpg_sleep_mode_pings |
0.000s |
0.000us |
0 |
1 |
0.00
|
| chip_sw_alert_handler_lpg_clock_off |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
661.390s |
5965.645us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_lpg_reset_toggle |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
768.470s |
6899.237us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_ping_ok |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_ping_ok |
805.230s |
8329.052us |
1 |
1 |
100.00
|
| chip_sw_alert_handler_reverse_ping_in_deep_sleep |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_reverse_ping_in_deep_sleep |
8673.730s |
255494.374us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wakeup_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
251.260s |
3833.278us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_smoketest |
273.820s |
6003.627us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bark_irq |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_irq |
251.260s |
3833.278us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_bite_reset |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
445.770s |
7468.238us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wdog_bite_reset |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_bite_reset |
445.770s |
7468.238us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_sleep_wdog_sleep_pause |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_sleep_wdog_sleep_pause |
323.840s |
7808.632us |
1 |
1 |
100.00
|
| chip_sw_aon_timer_wdog_lc_escalate |
1 |
1 |
100.00 |
|
chip_sw_aon_timer_wdog_lc_escalate |
267.670s |
4881.173us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_idle_trans |
4 |
4 |
100.00 |
|
chip_sw_otbn_randomness |
524.800s |
5320.684us |
1 |
1 |
100.00
|
|
chip_sw_aes_idle |
164.810s |
3211.618us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_idle |
202.950s |
3189.793us |
1 |
1 |
100.00
|
|
chip_sw_kmac_idle |
144.510s |
2912.027us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_trans |
4 |
4 |
100.00 |
|
chip_sw_clkmgr_off_aes_trans |
291.380s |
5278.461us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_hmac_trans |
240.370s |
4305.501us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_kmac_trans |
216.100s |
4128.469us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_off_otbn_trans |
266.090s |
4622.028us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_off_peri |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_off_peri |
965.410s |
12978.415us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_div |
7 |
7 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
339.800s |
3426.818us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
339.280s |
4120.443us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
408.390s |
4471.901us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
388.620s |
4669.721us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
408.460s |
4172.276us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
327.890s |
4632.341us |
1 |
1 |
100.00
|
|
chip_sw_ast_clk_outputs |
569.200s |
7198.547us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_lc |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_lc |
227.370s |
6037.567us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_external_clk_src_for_sw |
2 |
2 |
100.00 |
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
408.390s |
4471.901us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
388.620s |
4669.721us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_jitter |
10 |
10 |
100.00 |
|
chip_sw_flash_ctrl_ops_jitter_en |
318.830s |
3329.876us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
586.130s |
5549.862us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3419.110s |
18615.603us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en |
158.210s |
3367.606us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs_jitter |
606.820s |
6884.430us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
142.690s |
2378.067us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
795.310s |
6616.984us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
173.410s |
3290.958us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
357.990s |
4971.258us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_jitter |
158.750s |
3301.204us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_extended_range |
11 |
11 |
100.00 |
|
chip_sw_clkmgr_jitter_reduced_freq |
124.610s |
2824.682us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en_reduced_freq |
383.370s |
4118.173us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en_reduced_freq |
607.770s |
7369.579us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq |
3198.290s |
24994.207us |
1 |
1 |
100.00
|
|
chip_sw_aes_enc_jitter_en_reduced_freq |
169.070s |
3153.951us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en_reduced_freq |
133.240s |
3165.564us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en_reduced_freq |
676.570s |
7040.844us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en_reduced_freq |
178.320s |
3343.608us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq |
335.220s |
5327.032us |
1 |
1 |
100.00
|
|
chip_sw_flash_init_reduced_freq |
1253.820s |
24680.967us |
1 |
1 |
100.00
|
|
chip_sw_csrng_edn_concurrency_reduced_freq |
2511.440s |
23330.901us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_deep_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_ast_clk_outputs |
569.200s |
7198.547us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_sleep_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_sleep_frequency |
361.970s |
4158.840us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_reset_frequency |
1 |
1 |
100.00 |
|
chip_sw_clkmgr_reset_frequency |
232.500s |
3092.338us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
366.760s |
4641.643us |
1 |
1 |
100.00
|
| chip_sw_clkmgr_alert_handler_clock_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_clkoff |
661.390s |
5965.645us |
1 |
1 |
100.00
|
| chip_sw_csrng_edn_cmd |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
867.370s |
7119.656us |
1 |
1 |
100.00
|
| chip_sw_csrng_fuse_en_sw_app_read |
0 |
1 |
0.00 |
|
chip_sw_csrng_fuse_en_sw_app_read_test |
183.160s |
3187.800us |
0 |
1 |
0.00
|
| chip_sw_csrng_lc_hw_debug_en |
1 |
1 |
100.00 |
|
chip_sw_csrng_lc_hw_debug_en_test |
340.500s |
5611.939us |
1 |
1 |
100.00
|
| chip_sw_csrng_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_csrng_kat_test |
129.370s |
3092.996us |
1 |
1 |
100.00
|
| chip_sw_edn_entropy_reqs |
3 |
3 |
100.00 |
|
chip_sw_csrng_edn_concurrency |
2969.160s |
18144.732us |
1 |
1 |
100.00
|
|
chip_sw_entropy_src_ast_rng_req |
110.400s |
2751.072us |
1 |
1 |
100.00
|
|
chip_sw_edn_entropy_reqs |
713.160s |
7735.215us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_ast_rng_req |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_ast_rng_req |
110.400s |
2751.072us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_csrng |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_csrng |
867.370s |
7119.656us |
1 |
1 |
100.00
|
| chip_sw_entropy_src_known_answer_tests |
1 |
1 |
100.00 |
|
chip_sw_entropy_src_kat_test |
141.950s |
3228.060us |
1 |
1 |
100.00
|
| chip_sw_flash_init |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1364.930s |
25653.345us |
1 |
1 |
100.00
|
| chip_sw_flash_host_access |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_access |
635.400s |
5661.302us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_access_jitter_en |
586.130s |
5549.862us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_ops |
2 |
2 |
100.00 |
|
chip_sw_flash_ctrl_ops |
315.840s |
3203.980us |
1 |
1 |
100.00
|
|
chip_sw_flash_ctrl_ops_jitter_en |
318.830s |
3329.876us |
1 |
1 |
100.00
|
| chip_sw_flash_rma_unlocked |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3591.380s |
43075.903us |
1 |
1 |
100.00
|
| chip_sw_flash_scramble |
1 |
1 |
100.00 |
|
chip_sw_flash_init |
1364.930s |
25653.345us |
1 |
1 |
100.00
|
| chip_sw_flash_idle_low_power |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_idle_low_power |
221.190s |
3086.905us |
1 |
1 |
100.00
|
| chip_sw_flash_keymgr_seeds |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1290.230s |
10343.735us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_creator_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
246.070s |
5027.173us |
1 |
1 |
100.00
|
| chip_sw_flash_creator_seed_wipe_on_rma |
1 |
1 |
100.00 |
|
chip_sw_flash_rma_unlocked |
3591.380s |
43075.903us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_owner_seed_sw_rw_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
246.070s |
5027.173us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
246.070s |
5027.173us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_iso_part_sw_wr_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
246.070s |
5027.173us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_seed_hw_rd_en |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_lc_rw_en |
246.070s |
5027.173us |
1 |
1 |
100.00
|
| chip_sw_flash_lc_escalate_en |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
366.760s |
4641.643us |
1 |
1 |
100.00
|
| chip_sw_flash_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
118.920s |
5516.968us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_clock_freqs |
1 |
1 |
100.00 |
|
chip_sw_flash_ctrl_clock_freqs |
507.620s |
5223.881us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
456.130s |
4982.278us |
1 |
1 |
100.00
|
| chip_sw_flash_ctrl_write_clear |
1 |
1 |
100.00 |
|
chip_sw_flash_crash_alert |
456.130s |
4982.278us |
1 |
1 |
100.00
|
| chip_sw_hmac_enc |
2 |
2 |
100.00 |
|
chip_sw_hmac_enc |
148.400s |
3408.690us |
1 |
1 |
100.00
|
|
chip_sw_hmac_enc_jitter_en |
142.690s |
2378.067us |
1 |
1 |
100.00
|
| chip_sw_hmac_idle |
1 |
1 |
100.00 |
|
chip_sw_hmac_enc_idle |
202.950s |
3189.793us |
1 |
1 |
100.00
|
| chip_sw_hmac_all_configurations |
1 |
1 |
100.00 |
|
chip_sw_hmac_oneshot |
587.430s |
5910.922us |
1 |
1 |
100.00
|
| chip_sw_hmac_multistream_mode |
1 |
1 |
100.00 |
|
chip_sw_hmac_multistream |
347.380s |
4503.791us |
1 |
1 |
100.00
|
| chip_sw_i2c_host_tx_rx |
3 |
3 |
100.00 |
|
chip_sw_i2c_host_tx_rx |
351.030s |
4382.005us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx1 |
472.310s |
5487.642us |
1 |
1 |
100.00
|
|
chip_sw_i2c_host_tx_rx_idx2 |
360.180s |
5529.343us |
1 |
1 |
100.00
|
| chip_sw_i2c_device_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_i2c_device_tx_rx |
298.330s |
4146.074us |
1 |
1 |
100.00
|
| chip_sw_keymgr_key_derivation |
2 |
2 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1290.230s |
10343.735us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation_jitter_en |
795.310s |
6616.984us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_kmac |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_kmac |
1558.640s |
10566.346us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_aes |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_aes |
1221.740s |
9861.048us |
1 |
1 |
100.00
|
| chip_sw_keymgr_sideload_otbn |
1 |
1 |
100.00 |
|
chip_sw_keymgr_sideload_otbn |
2605.810s |
16122.885us |
1 |
1 |
100.00
|
| chip_sw_kmac_enc |
3 |
3 |
100.00 |
|
chip_sw_kmac_mode_cshake |
132.530s |
2644.810us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac |
185.530s |
2990.641us |
1 |
1 |
100.00
|
|
chip_sw_kmac_mode_kmac_jitter_en |
173.410s |
3290.958us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_keymgr |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation |
1290.230s |
10343.735us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_lc |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
| chip_sw_kmac_app_rom |
1 |
1 |
100.00 |
|
chip_sw_kmac_app_rom |
152.510s |
3228.443us |
1 |
1 |
100.00
|
| chip_sw_kmac_entropy |
1 |
1 |
100.00 |
|
chip_sw_kmac_entropy |
622.070s |
5170.865us |
1 |
1 |
100.00
|
| chip_sw_kmac_idle |
1 |
1 |
100.00 |
|
chip_sw_kmac_idle |
144.510s |
2912.027us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_alert_handler_escalation |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_escalation |
302.360s |
4811.025us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_jtag_access |
3 |
3 |
100.00 |
|
chip_tap_straps_dev |
771.690s |
12082.708us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
157.590s |
4028.183us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
886.640s |
13226.222us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_otp_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
136.630s |
3070.080us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_transitions |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_kmac_req |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_key_div |
1 |
1 |
100.00 |
|
chip_sw_keymgr_key_derivation_prod |
924.820s |
8636.784us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_broadcast |
20 |
22 |
90.91 |
|
chip_prim_tl_access |
118.920s |
5516.968us |
1 |
1 |
100.00
|
|
chip_rv_dm_lc_disabled |
46.570s |
2971.339us |
0 |
1 |
0.00
|
|
chip_sw_flash_ctrl_lc_rw_en |
246.070s |
5027.173us |
1 |
1 |
100.00
|
|
chip_sw_flash_rma_unlocked |
3591.380s |
43075.903us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
194.600s |
2845.379us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
398.270s |
6233.096us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
497.090s |
6048.204us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
394.900s |
5545.236us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1290.230s |
10343.735us |
1 |
1 |
100.00
|
|
chip_sw_rom_ctrl_integrity_check |
395.660s |
8776.873us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_execution_main |
550.040s |
8504.103us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_lc |
227.370s |
6037.567us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0 |
339.800s |
3426.818us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0 |
339.280s |
4120.443us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_dev |
408.390s |
4471.901us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_dev |
388.620s |
4669.721us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_fast_rma |
408.460s |
4172.276us |
1 |
1 |
100.00
|
|
chip_sw_clkmgr_external_clk_src_for_sw_slow_rma |
327.890s |
4632.341us |
1 |
1 |
100.00
|
|
chip_tap_straps_dev |
771.690s |
12082.708us |
1 |
1 |
100.00
|
|
chip_tap_straps_rma |
157.590s |
4028.183us |
1 |
1 |
100.00
|
|
chip_tap_straps_prod |
886.640s |
13226.222us |
1 |
1 |
100.00
|
| chip_lc_scrap |
4 |
4 |
100.00 |
|
chip_sw_lc_ctrl_rma_to_scrap |
189.930s |
3706.761us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_raw_to_scrap |
91.040s |
2923.685us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_test_locked0_to_scrap |
107.110s |
4204.401us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_rand_to_scrap |
131.030s |
3680.217us |
1 |
1 |
100.00
|
| chip_lc_test_locked |
1 |
2 |
50.00 |
|
chip_rv_dm_lc_disabled |
46.570s |
2971.339us |
0 |
1 |
0.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1143.580s |
23783.577us |
1 |
1 |
100.00
|
| chip_sw_lc_walkthrough |
5 |
5 |
100.00 |
|
chip_sw_lc_walkthrough_dev |
3738.790s |
51640.188us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prod |
3812.140s |
47540.885us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_prodend |
588.470s |
11661.257us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_rma |
3849.200s |
48339.724us |
1 |
1 |
100.00
|
|
chip_sw_lc_walkthrough_testunlocks |
1143.580s |
23783.577us |
1 |
1 |
100.00
|
| chip_sw_lc_ctrl_volatile_raw_unlock |
3 |
3 |
100.00 |
|
chip_sw_lc_ctrl_volatile_raw_unlock |
54.510s |
2156.889us |
1 |
1 |
100.00
|
|
chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz |
72.290s |
2935.472us |
1 |
1 |
100.00
|
|
rom_volatile_raw_unlock |
66.720s |
2343.716us |
1 |
1 |
100.00
|
| chip_sw_otbn_op |
2 |
2 |
100.00 |
|
chip_sw_otbn_ecdsa_op_irq |
3314.040s |
17092.602us |
1 |
1 |
100.00
|
|
chip_sw_otbn_ecdsa_op_irq_jitter_en |
3419.110s |
18615.603us |
1 |
1 |
100.00
|
| chip_sw_otbn_rnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
524.800s |
5320.684us |
1 |
1 |
100.00
|
| chip_sw_otbn_urnd_entropy |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
524.800s |
5320.684us |
1 |
1 |
100.00
|
| chip_sw_otbn_idle |
1 |
1 |
100.00 |
|
chip_sw_otbn_randomness |
524.800s |
5320.684us |
1 |
1 |
100.00
|
| chip_sw_otbn_mem_scramble |
1 |
1 |
100.00 |
|
chip_sw_otbn_mem_scramble |
309.000s |
3872.005us |
1 |
1 |
100.00
|
| chip_otp_ctrl_init |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_keys |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1364.930s |
25653.345us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
309.000s |
3872.005us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1290.230s |
10343.735us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
361.380s |
4161.897us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
129.900s |
2841.058us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_entropy |
5 |
5 |
100.00 |
|
chip_sw_flash_init |
1364.930s |
25653.345us |
1 |
1 |
100.00
|
|
chip_sw_otbn_mem_scramble |
309.000s |
3872.005us |
1 |
1 |
100.00
|
|
chip_sw_keymgr_key_derivation |
1290.230s |
10343.735us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access |
361.380s |
4161.897us |
1 |
1 |
100.00
|
|
chip_sw_rv_core_ibex_icache_invalidate |
129.900s |
2841.058us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_program_error |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_program_error |
251.950s |
5627.465us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_hw_cfg0 |
1 |
1 |
100.00 |
|
chip_sw_lc_ctrl_otp_hw_cfg0 |
136.630s |
3070.080us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_lc_signals |
5 |
6 |
83.33 |
|
chip_prim_tl_access |
118.920s |
5516.968us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_test_unlocked0 |
194.600s |
2845.379us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_dev |
398.270s |
6233.096us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_prod |
497.090s |
6048.204us |
1 |
1 |
100.00
|
|
chip_sw_otp_ctrl_lc_signals_rma |
394.900s |
5545.236us |
0 |
1 |
0.00
|
|
chip_sw_lc_ctrl_transition |
504.920s |
9893.502us |
1 |
1 |
100.00
|
| chip_sw_otp_prim_tl_access |
1 |
1 |
100.00 |
|
chip_prim_tl_access |
118.920s |
5516.968us |
1 |
1 |
100.00
|
| chip_sw_otp_ctrl_dai_lock |
1 |
1 |
100.00 |
|
chip_sw_otp_ctrl_dai_lock |
774.410s |
6940.141us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_external_full_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
233.490s |
7548.063us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_all_wake_ups |
931.600s |
27184.875us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_wake_ups |
243.950s |
7751.616us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_por_reset |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_deep_sleep_por_reset |
255.780s |
6855.882us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_normal_sleep_por_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_por_reset |
410.910s |
7291.823us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_wake_ups |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_all_wake_ups |
934.710s |
21980.875us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
1 |
2 |
50.00 |
|
chip_sw_pwrmgr_deep_sleep_all_reset_reqs |
364.860s |
10446.267us |
0 |
1 |
0.00
|
|
chip_sw_aon_timer_wdog_bite_reset |
445.770s |
7468.238us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_normal_sleep_all_reset_reqs |
764.150s |
12655.126us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_wdog_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_wdog_reset |
319.560s |
4952.667us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_aon_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_full_aon_reset |
233.490s |
7548.063us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_main_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_main_power_glitch_reset |
204.750s |
4269.942us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_random_sleep_power_glitch_reset |
1910.750s |
37105.836us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_deep_sleep_power_glitch_reset |
361.360s |
7879.506us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_power_glitch_reset |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_power_glitch_reset |
352.610s |
5347.340us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_random_sleep_all_reset_reqs |
0 |
1 |
0.00 |
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
413.970s |
12175.070us |
0 |
1 |
0.00
|
| chip_sw_pwrmgr_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
668.980s |
6670.583us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_all_reset_reqs |
764.590s |
8554.566us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_b2b_sleep_reset_req |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_b2b_sleep_reset_req |
1935.780s |
30660.426us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_sleep_disabled |
1 |
1 |
100.00 |
|
chip_sw_pwrmgr_sleep_disabled |
142.560s |
3089.155us |
1 |
1 |
100.00
|
| chip_sw_pwrmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
366.760s |
4641.643us |
1 |
1 |
100.00
|
| chip_sw_rom_access |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
395.660s |
8776.873us |
1 |
1 |
100.00
|
| chip_sw_rom_ctrl_integrity_check |
1 |
1 |
100.00 |
|
chip_sw_rom_ctrl_integrity_check |
395.660s |
8776.873us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_non_sys_reset_info |
3 |
4 |
75.00 |
|
chip_sw_pwrmgr_all_reset_reqs |
764.590s |
8554.566us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_random_sleep_all_reset_reqs |
413.970s |
12175.070us |
0 |
1 |
0.00
|
|
chip_sw_pwrmgr_wdog_reset |
319.560s |
4952.667us |
1 |
1 |
100.00
|
|
chip_sw_pwrmgr_smoketest |
273.820s |
6003.627us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sys_reset_info |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
222.030s |
3933.149us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_cpu_info |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
336.510s |
4459.447us |
0 |
1 |
0.00
|
| chip_sw_rstmgr_sw_req_reset |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_req |
188.490s |
3723.908us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_info |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_alert_info |
1118.140s |
12520.322us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_sw_rst |
1 |
1 |
100.00 |
|
chip_sw_rstmgr_sw_rst |
135.620s |
3082.610us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_escalation_reset |
1 |
1 |
100.00 |
|
chip_sw_all_escalation_resets |
366.760s |
4641.643us |
1 |
1 |
100.00
|
| chip_sw_rstmgr_alert_handler_reset_enables |
1 |
1 |
100.00 |
|
chip_sw_alert_handler_lpg_reset_toggle |
768.470s |
6899.237us |
1 |
1 |
100.00
|
| chip_sw_nmi_irq |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_nmi_irq |
482.520s |
4318.824us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_rnd |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_rnd |
437.550s |
4254.632us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_address_translation |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_address_translation |
143.620s |
2755.617us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_icache_scrambled_access |
1 |
1 |
100.00 |
|
chip_sw_rv_core_ibex_icache_invalidate |
129.900s |
2841.058us |
1 |
1 |
100.00
|
| chip_sw_rv_core_ibex_fault_dump |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
336.510s |
4459.447us |
0 |
1 |
0.00
|
| chip_sw_rv_core_ibex_double_fault |
0 |
1 |
0.00 |
|
chip_sw_rstmgr_cpu_info |
336.510s |
4459.447us |
0 |
1 |
0.00
|
| chip_jtag_csr_rw |
1 |
1 |
100.00 |
|
chip_jtag_csr_rw |
1740.700s |
19981.605us |
1 |
1 |
100.00
|
| chip_jtag_mem_access |
1 |
1 |
100.00 |
|
chip_jtag_mem_access |
901.620s |
13087.109us |
1 |
1 |
100.00
|
| chip_rv_dm_ndm_reset_req |
1 |
1 |
100.00 |
|
chip_rv_dm_ndm_reset_req |
222.030s |
3933.149us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_ndm_reset_req_when_cpu_halted |
278.220s |
4877.583us |
1 |
1 |
100.00
|
| chip_rv_dm_access_after_wakeup |
1 |
1 |
100.00 |
|
chip_sw_rv_dm_access_after_wakeup |
244.430s |
5180.838us |
1 |
1 |
100.00
|
| chip_sw_rv_dm_jtag_tap_sel |
1 |
1 |
100.00 |
|
chip_tap_straps_rma |
157.590s |
4028.183us |
1 |
1 |
100.00
|
| chip_rv_dm_lc_disabled |
0 |
1 |
0.00 |
|
chip_rv_dm_lc_disabled |
46.570s |
2971.339us |
0 |
1 |
0.00
|
| chip_sw_plic_all_irqs |
3 |
3 |
100.00 |
|
chip_plic_all_irqs_0 |
602.430s |
5921.075us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_10 |
258.070s |
3190.984us |
1 |
1 |
100.00
|
|
chip_plic_all_irqs_20 |
338.460s |
4467.684us |
1 |
1 |
100.00
|
| chip_sw_plic_sw_irq |
1 |
1 |
100.00 |
|
chip_sw_plic_sw_irq |
142.320s |
3035.315us |
1 |
1 |
100.00
|
| chip_sw_timer |
1 |
1 |
100.00 |
|
chip_sw_rv_timer_irq |
152.840s |
3359.284us |
1 |
1 |
100.00
|
| chip_sw_spi_device_flash_mode |
1 |
1 |
100.00 |
|
rom_e2e_smoke |
2597.050s |
16620.951us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through |
1 |
1 |
100.00 |
|
chip_sw_spi_device_pass_through |
498.520s |
7363.956us |
1 |
1 |
100.00
|
| chip_sw_spi_device_pass_through_collision |
0 |
1 |
0.00 |
|
chip_sw_spi_device_pass_through_collision |
151.030s |
2742.656us |
0 |
1 |
0.00
|
| chip_sw_spi_device_tpm |
1 |
1 |
100.00 |
|
chip_sw_spi_device_tpm |
162.060s |
3213.679us |
1 |
1 |
100.00
|
| chip_sw_spi_host_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_spi_host_tx_rx |
126.510s |
2720.310us |
1 |
1 |
100.00
|
| chip_sw_sram_scrambled_access |
2 |
2 |
100.00 |
|
chip_sw_sram_ctrl_scrambled_access |
361.380s |
4161.897us |
1 |
1 |
100.00
|
|
chip_sw_sram_ctrl_scrambled_access_jitter_en |
357.990s |
4971.258us |
1 |
1 |
100.00
|
| chip_sw_sleep_sram_ret_contents |
2 |
2 |
100.00 |
|
chip_sw_sleep_sram_ret_contents_no_scramble |
465.680s |
8621.679us |
1 |
1 |
100.00
|
|
chip_sw_sleep_sram_ret_contents_scramble |
453.860s |
8015.677us |
1 |
1 |
100.00
|
| chip_sw_sram_execution |
1 |
1 |
100.00 |
|
chip_sw_sram_ctrl_execution_main |
550.040s |
8504.103us |
1 |
1 |
100.00
|
| chip_sw_sram_lc_escalation |
2 |
2 |
100.00 |
|
chip_sw_all_escalation_resets |
366.760s |
4641.643us |
1 |
1 |
100.00
|
|
chip_sw_data_integrity_escalation |
427.480s |
6268.486us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_reset |
2 |
2 |
100.00 |
|
chip_sw_pwrmgr_sysrst_ctrl_reset |
668.980s |
6670.583us |
1 |
1 |
100.00
|
|
chip_sw_sysrst_ctrl_reset |
1038.770s |
22908.751us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_inputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_inputs |
122.010s |
2886.674us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_outputs |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_outputs |
226.520s |
3571.682us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_in_irq |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_in_irq |
381.640s |
5128.533us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_wakeup |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1038.770s |
22908.751us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_sleep_reset |
1 |
1 |
100.00 |
|
chip_sw_sysrst_ctrl_reset |
1038.770s |
22908.751us |
1 |
1 |
100.00
|
| chip_sw_sysrst_ctrl_ec_rst_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
816.660s |
12030.497us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_flash_wp_l |
0 |
1 |
0.00 |
|
chip_sw_sysrst_ctrl_ec_rst_l |
816.660s |
12030.497us |
0 |
1 |
0.00
|
| chip_sw_sysrst_ctrl_ulp_z3_wakeup |
1 |
2 |
50.00 |
|
chip_sw_sysrst_ctrl_ulp_z3_wakeup |
230.230s |
6423.343us |
1 |
1 |
100.00
|
|
chip_sw_adc_ctrl_sleep_debug_cable_wakeup |
2819.780s |
34680.998us |
0 |
1 |
0.00
|
| chip_sw_usbdev_vbus |
1 |
1 |
100.00 |
|
chip_sw_usbdev_vbus |
126.830s |
2369.706us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pullup |
126.160s |
3088.944us |
1 |
1 |
100.00
|
| chip_sw_usbdev_aon_pullup |
1 |
1 |
100.00 |
|
chip_sw_usbdev_aon_pullup |
292.850s |
4162.915us |
1 |
1 |
100.00
|
| chip_sw_usbdev_setup_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_setuprx |
387.520s |
4574.958us |
1 |
1 |
100.00
|
| chip_sw_usbdev_config_host |
1 |
1 |
100.00 |
|
chip_sw_usbdev_config_host |
994.170s |
8180.668us |
1 |
1 |
100.00
|
| chip_sw_usbdev_pincfg |
1 |
1 |
100.00 |
|
chip_sw_usbdev_pincfg |
4823.640s |
32139.006us |
1 |
1 |
100.00
|
| chip_sw_usbdev_tx_rx |
1 |
1 |
100.00 |
|
chip_sw_usbdev_dpi |
1854.720s |
11743.276us |
1 |
1 |
100.00
|
| chip_sw_usbdev_toggle_restore |
1 |
1 |
100.00 |
|
chip_sw_usbdev_toggle_restore |
112.550s |
2469.245us |
1 |
1 |
100.00
|